Searched refs:DFCMEMCTL (Results 1 – 4 of 4) sorted by relevance
432 val = regr(DFCMEMCTL) | (1 << ISIF_DFCMEMCTL_DFCMARST_SHIFT) | 1; in isif_config_dfc()433 regw(val, DFCMEMCTL); in isif_config_dfc()436 while (count && (regr(DFCMEMCTL) & 0x1)) in isif_config_dfc()453 val = regr(DFCMEMCTL); in isif_config_dfc()457 regw(val, DFCMEMCTL); in isif_config_dfc()460 while (count && (regr(DFCMEMCTL) & 0x1)) in isif_config_dfc()473 regw(1, DFCMEMCTL); in isif_config_dfc()
373 val = regr(DFCMEMCTL) | CCDC_DFCMEMCTL_DFCMWR_MASK; in ccdc_write_dfc_entry()374 regw(val, DFCMEMCTL); in ccdc_write_dfc_entry()380 while (regr(DFCMEMCTL) & CCDC_DFCMEMCTL_DFCMWR_MASK) in ccdc_write_dfc_entry()433 regw(val, DFCMEMCTL); in ccdc_config_vdfc()
49 #define DFCMEMCTL 0x94 macro
77 #define DFCMEMCTL 0x120 macro