Home
last modified time | relevance | path

Searched refs:DFLAGS (Results 1 – 11 of 11) sorted by relevance

/drivers/clk/rockchip/
Dclk-rk3399.c239 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
422 RK3399_CLKSEL_CON(39), 6, 2, MFLAGS, 0, 5, DFLAGS,
441 RK3399_CLKSEL_CON(40), 15, 1, MFLAGS, 0, 10, DFLAGS,
445 RK3399_CLKSEL_CON(41), 15, 1, MFLAGS, 0, 10, DFLAGS,
449 RK3399_CLKSEL_CON(64), 15, 1, MFLAGS, 8, 5, DFLAGS,
453 RK3399_CLKSEL_CON(64), 6, 2, MFLAGS, 0, 5, DFLAGS,
457 RK3399_CLKSEL_CON(65), 15, 1, MFLAGS, 8, 5, DFLAGS,
461 RK3399_CLKSEL_CON(65), 6, 2, MFLAGS, 0, 5, DFLAGS,
475 RK3399_CLKSEL_CON(0), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
478 RK3399_CLKSEL_CON(1), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
[all …]
Dclk-rk3328.c232 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
269 RK3328_CLKSEL_CON(2), 8, 5, DFLAGS),
271 RK3328_CLKSEL_CON(38), 14, 2, MFLAGS, 0, 14, DFLAGS,
294 RK3328_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
297 RK3328_CLKSEL_CON(1), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
309 RK3328_CLKSEL_CON(44), 6, 2, MFLAGS, 0, 5, DFLAGS,
318 RK3328_CLKSEL_CON(3), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
330 RK3328_CLKSEL_CON(4), 13, 2, MFLAGS, 8, 3, DFLAGS,
349 RK3328_CLKSEL_CON(0), 13, 2, MFLAGS, 8, 5, DFLAGS,
352 RK3328_CLKSEL_CON(1), 8, 2, DFLAGS,
[all …]
Dclk-rv1108.c162 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
207 RV1108_CLKSEL_CON(1), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
210 RV1108_CLKSEL_CON(1), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
219 RV1108_CLKSEL_CON(37), 6, 2, MFLAGS, 0, 5, DFLAGS,
224 RV1108_CLKSEL_CON(37), 14, 2, MFLAGS, 8, 5, DFLAGS,
237 RV1108_CLKSEL_CON(36), 6, 2, MFLAGS, 0, 5, DFLAGS,
242 RV1108_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
246 RV1108_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
249 RV1108_CLKSEL_CON(36), 14, 2, MFLAGS, 8, 5, DFLAGS,
268 RV1108_CLKSEL_CON(38), 0, 5, DFLAGS,
[all …]
Dclk-px30.c200 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
278 PX30_CLKSEL_CON(0), 8, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
281 PX30_CLKSEL_CON(0), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
304 PX30_CLKSEL_CON(1), 0, 4, DFLAGS,
307 PX30_CLKSEL_CON(1), 8, 4, DFLAGS,
313 PX30_CLKSEL_CON(1), 13, 2, DFLAGS,
332 PX30_CLKSEL_CON(2), 7, 1, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
334 PX30_CLKSEL_CON(2), 7, 1, MFLAGS, 0, 3, DFLAGS),
359 PX30_CLKSEL_CON(2), 8, 5, DFLAGS,
380 PX30_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 5, DFLAGS,
[all …]
Dclk-rk3288.c240 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
287 RK3288_CLKSEL_CON(36), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
290 RK3288_CLKSEL_CON(36), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
293 RK3288_CLKSEL_CON(36), 8, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
296 RK3288_CLKSEL_CON(36), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
299 RK3288_CLKSEL_CON(37), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
302 RK3288_CLKSEL_CON(0), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
305 RK3288_CLKSEL_CON(0), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
308 RK3288_CLKSEL_CON(37), 4, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
311 RK3288_CLKSEL_CON(37), 9, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
[all …]
Dclk-rk3368.c152 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
293 RK3368_CLKSEL_CON(0), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
295 RK3368_CLKSEL_CON(1), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
297 RK3368_CLKSEL_CON(1), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
300 RK3368_CLKSEL_CON(2), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
302 RK3368_CLKSEL_CON(3), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
304 RK3368_CLKSEL_CON(3), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
313 RK3368_CLKSEL_CON(4), 6, 2, MFLAGS, 0, 5, DFLAGS),
315 RK3368_CLKSEL_CON(4), 8, 5, DFLAGS,
319 RK3368_CLKSEL_CON(5), 6, 2, MFLAGS, 0, 7, DFLAGS,
[all …]
Dclk-rk3228.c181 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
218 RK2928_CLKSEL_CON(4), 8, 5, DFLAGS),
228 RK2928_CLKSEL_CON(26), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
243 RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
246 RK2928_CLKSEL_CON(1), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
265 RK2928_CLKSEL_CON(0), 13, 2, MFLAGS, 8, 5, DFLAGS),
269 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS,
272 RK2928_CLKSEL_CON(1), 12, 3, DFLAGS,
283 RK2928_CLKSEL_CON(32), 5, 2, MFLAGS, 0, 5, DFLAGS,
289 RK2928_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 5, DFLAGS,
[all …]
Dclk-rk3308.c195 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
299 RK3308_CLKSEL_CON(0), 8, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
302 RK3308_CLKSEL_CON(0), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
319 RK3308_CLKSEL_CON(6), 8, 5, DFLAGS,
324 RK3308_CLKSEL_CON(6), 0, 5, DFLAGS,
327 RK3308_CLKSEL_CON(5), 0, 5, DFLAGS,
331 RK3308_CLKSEL_CON(10), 13, 3, MFLAGS, 0, 5, DFLAGS,
341 RK3308_CLKSEL_CON(13), 13, 3, MFLAGS, 0, 5, DFLAGS,
351 RK3308_CLKSEL_CON(16), 13, 3, MFLAGS, 0, 5, DFLAGS,
361 RK3308_CLKSEL_CON(19), 13, 3, MFLAGS, 0, 5, DFLAGS,
[all …]
Dclk-rk3128.c169 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
205 RK2928_CLKSEL_CON(4), 8, 5, DFLAGS),
213 RK2928_CLKSEL_CON(26), 8, 2, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
223 RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
226 RK2928_CLKSEL_CON(1), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
235 RK2928_CLKSEL_CON(0), 13, 2, MFLAGS, 8, 5, DFLAGS,
240 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS,
243 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS,
246 RK2928_CLKSEL_CON(24), 0, 2, DFLAGS,
251 RK2928_CLKSEL_CON(32), 5, 3, MFLAGS, 0, 5, DFLAGS,
[all …]
Dclk-rk3188.c236 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
282 RK2928_CLKSEL_CON(0), 6, 2, DFLAGS | CLK_DIVIDER_READ_ONLY,
286 RK2928_CLKSEL_CON(32), 7, 1, MFLAGS, 0, 5, DFLAGS,
291 RK2928_CLKSEL_CON(32), 15, 1, MFLAGS, 8, 5, DFLAGS,
299 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
313 RK2928_CLKSEL_CON(31), 7, 1, MFLAGS, 0, 5, DFLAGS,
316 RK2928_CLKSEL_CON(31), 15, 1, MFLAGS, 8, 5, DFLAGS,
322 RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
325 RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
331 RK2928_CLKSEL_CON(29), 1, 5, DFLAGS,
[all …]
Dclk-rk3036.c144 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
186 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
190 RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
193 RK2928_CLKSEL_CON(1), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
199 RK2928_CLKSEL_CON(0), 14, 2, MFLAGS, 8, 5, DFLAGS),
203 RK2928_CLKSEL_CON(1), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
206 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_READ_ONLY,
210 RK2928_CLKSEL_CON(10), 14, 2, MFLAGS, 0, 5, DFLAGS,
216 RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
220 RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
[all …]