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Searched refs:EDP_PSR_IIR (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/
Di915_irq.c2453 u32 psr_iir = I915_READ(EDP_PSR_IIR); in ivb_display_irq_handler()
2456 I915_WRITE(EDP_PSR_IIR, psr_iir); in ivb_display_irq_handler()
2658 u32 psr_iir = I915_READ(EDP_PSR_IIR); in gen8_de_misc_irq_handler()
2661 I915_WRITE(EDP_PSR_IIR, psr_iir); in gen8_de_misc_irq_handler()
3225 intel_uncore_write(uncore, EDP_PSR_IIR, 0xffffffff); in ironlake_irq_reset()
3256 intel_uncore_write(uncore, EDP_PSR_IIR, 0xffffffff); in gen8_irq_reset()
3283 intel_uncore_write(uncore, EDP_PSR_IIR, 0xffffffff); in gen11_irq_reset()
3686 gen3_assert_iir_is_zero(uncore, EDP_PSR_IIR); in ironlake_irq_postinstall()
3797 gen3_assert_iir_is_zero(uncore, EDP_PSR_IIR); in gen8_de_irq_postinstall()
Di915_reg.h4232 #define EDP_PSR_IIR _MMIO(0x64838) macro
/drivers/gpu/drm/i915/display/
Dintel_psr.c1234 val = I915_READ(EDP_PSR_IIR); in intel_psr_init()
/drivers/gpu/drm/i915/gvt/
Dhandlers.c2670 MMIO_DH(EDP_PSR_IIR, D_BDW_PLUS, NULL, edp_psr_imr_iir_write); in init_generic_mmio_info()