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Searched refs:FW_PORT_CAP32_ANEG (Results 1 – 7 of 7) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_ethtool.c637 if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG) in get_link_ksettings()
662 if (!(lc->pcaps & FW_PORT_CAP32_ANEG) || in set_link_ksettings()
678 lc->acaps = fw_caps | FW_PORT_CAP32_ANEG; in set_link_ksettings()
808 else if (lc->pcaps & FW_PORT_CAP32_ANEG) in set_pauseparam()
Dt4_hw.c3976 FW_PORT_CAP32_ANEG)
4169 if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) { in t4_link_acaps()
4224 if (!(lc->pcaps & FW_PORT_CAP32_ANEG) && in t4_link_l1cfg_core()
4290 c.u.l1cfg32.rcap32 = cpu_to_be32(FW_PORT_CAP32_ANEG); in t4_restart_aneg()
8696 if (!(lc->acaps & FW_PORT_CAP32_ANEG)) { in t4_handle_get_port_info()
8698 } else if (lc->acaps & FW_PORT_CAP32_ANEG) { in t4_handle_get_port_info()
8913 if (lc->pcaps & FW_PORT_CAP32_ANEG) { in init_link_config()
Dt4fw_api.h2607 #define FW_PORT_CAP32_ANEG 0x00100000UL macro
/drivers/net/ethernet/chelsio/cxgb4vf/
Dt4vf_hw.c327 FW_PORT_CAP32_ANEG)
481 if (lc->pcaps & FW_PORT_CAP32_ANEG) { in init_link_config()
2041 if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) { in t4vf_handle_get_port_info()
2043 } else if (lc->acaps & FW_PORT_CAP32_ANEG) { in t4vf_handle_get_port_info()
Dcxgb4vf_main.c1483 if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG) in cxgb4vf_get_link_ksettings()
/drivers/scsi/csiostor/
Dcsio_hw.h318 FW_PORT_CAP32_ANEG)
Dcsio_hw.c1713 if (lc->pcaps & FW_PORT_CAP32_ANEG) { in csio_init_link_config()
1755 if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) { in csio_link_l1cfg()