Searched refs:GEN7_MISCCPCTL (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/i915/gt/uc/ |
| D | intel_guc_fw.c | 49 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, in guc_prepare_xfer()
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| /drivers/gpu/drm/i915/ |
| D | i915_perf.c | 1619 I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) & in hsw_enable_metric_set()
1639 I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) | in hsw_disable_metric_set()
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| D | i915_irq.c | 1297 misccpctl = I915_READ(GEN7_MISCCPCTL); in ivybridge_parity_work()
1298 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in ivybridge_parity_work()
1299 POSTING_READ(GEN7_MISCCPCTL); in ivybridge_parity_work()
1339 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in ivybridge_parity_work()
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| D | i915_drv.c | 2281 s->misccpctl = I915_READ(GEN7_MISCCPCTL); in vlv_save_gunit_s0ix_state()
2366 I915_WRITE(GEN7_MISCCPCTL, s->misccpctl); in vlv_restore_gunit_s0ix_state()
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| D | intel_pm.c | 103 I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL) in gen9_init_clock_gating()
9170 misccpctl = I915_READ(GEN7_MISCCPCTL); in gen8_set_l3sqc_credits()
9171 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in gen8_set_l3sqc_credits()
9185 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in gen8_set_l3sqc_credits()
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| D | i915_reg.h | 8899 #define GEN7_MISCCPCTL _MMIO(0x9424) macro
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| /drivers/gpu/drm/i915/gvt/ |
| D | handlers.c | 2776 MMIO_D(GEN7_MISCCPCTL, D_BDW_PLUS); in init_broadwell_mmio_info()
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