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Searched refs:HDP_HOST_PATH_CNTL (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgmc_v7_0.c864 data = REG_SET_FIELD(data, HDP_HOST_PATH_CNTL, CLOCK_GATING_DIS, 0); in gmc_v7_0_enable_hdp_mgcg()
866 data = REG_SET_FIELD(data, HDP_HOST_PATH_CNTL, CLOCK_GATING_DIS, 1); in gmc_v7_0_enable_hdp_mgcg()
Dsid.h639 #define HDP_HOST_PATH_CNTL 0xB00 macro
/drivers/gpu/drm/radeon/
Drv770.c1596 hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL); in rv770_gpu_init()
1597 WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl); in rv770_gpu_init()
Drv770d.h430 #define HDP_HOST_PATH_CNTL 0x2C00 macro
Dnid.h216 #define HDP_HOST_PATH_CNTL 0x2C00 macro
Dni.c1244 hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL); in cayman_gpu_init()
1245 WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl); in cayman_gpu_init()
Dsid.h637 #define HDP_HOST_PATH_CNTL 0x2C00 macro
Dcikd.h760 #define HDP_HOST_PATH_CNTL 0x2C00 macro
Dsi.c3351 hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL); in si_gpu_init()
3352 WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl); in si_gpu_init()
5590 orig = data = RREG32(HDP_HOST_PATH_CNTL); in si_enable_hdp_mgcg()
5598 WREG32(HDP_HOST_PATH_CNTL, data); in si_enable_hdp_mgcg()
Devergreend.h915 #define HDP_HOST_PATH_CNTL 0x2C00 macro
Dcik.c3414 hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL); in cik_gpu_init()
3415 WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl); in cik_gpu_init()
6266 orig = data = RREG32(HDP_HOST_PATH_CNTL); in cik_enable_hdp_mgcg()
6274 WREG32(HDP_HOST_PATH_CNTL, data); in cik_enable_hdp_mgcg()
Dr600d.h318 #define HDP_HOST_PATH_CNTL 0x2C00 macro
Dr600.c2378 tmp = RREG32(HDP_HOST_PATH_CNTL); in r600_gpu_init()
2379 WREG32(HDP_HOST_PATH_CNTL, tmp); in r600_gpu_init()
Devergreen.c3701 hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL); in evergreen_gpu_init()
3702 WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl); in evergreen_gpu_init()