Searched refs:I40E_L4_DST_MASK (Results 1 – 3 of 3) sorted by relevance
3030 if (i_set & I40E_L4_DST_MASK) in i40e_get_rss_hash_opts()3266 if (input_set & I40E_L4_DST_MASK) in i40e_get_ethtool_fdir_entry()3360 i_set |= I40E_L4_DST_MASK; in i40e_get_rss_hash_bits()3362 i_set &= ~I40E_L4_DST_MASK; in i40e_get_rss_hash_bits()3993 old_value = !!(old & I40E_L4_DST_MASK); in i40e_print_input_set()3994 new_value = !!(new & I40E_L4_DST_MASK); in i40e_print_input_set()4135 new_mask |= I40E_L4_DST_MASK; in i40e_check_fdir_input_set()4137 new_mask &= ~I40E_L4_DST_MASK; in i40e_check_fdir_input_set()4167 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; in i40e_check_fdir_input_set()4169 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_check_fdir_input_set()
1487 #define I40E_L4_DST_MASK (0x1ULL << I40E_L4_DST_SHIFT) macro
8339 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()8344 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()8349 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()8785 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_reenable_fdir_atr()