Searched refs:I915_NUM_ENGINES (Results 1 – 25 of 27) sorted by relevance
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| /drivers/gpu/drm/i915/gvt/ |
| D | scheduler.h | 42 struct intel_vgpu_workload *current_workload[I915_NUM_ENGINES];
47 struct intel_vgpu *engine_owner[I915_NUM_ENGINES];
50 struct task_struct *thread[I915_NUM_ENGINES];
51 wait_queue_head_t waitq[I915_NUM_ENGINES];
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| D | gvt.h | 150 struct intel_vgpu_execlist execlist[I915_NUM_ENGINES];
151 struct list_head workload_q_head[I915_NUM_ENGINES];
152 struct intel_context *shadow[I915_NUM_ENGINES];
159 DECLARE_BITMAP(shadow_ctx_desc_updated, I915_NUM_ENGINES);
160 DECLARE_BITMAP(tlb_handle_pending, I915_NUM_ENGINES);
161 void *ring_scan_buffer[I915_NUM_ENGINES];
162 int ring_scan_buffer_size[I915_NUM_ENGINES];
195 u32 hws_pga[I915_NUM_ENGINES];
320 struct notifier_block shadow_ctx_notifier_block[I915_NUM_ENGINES];
336 int ctx_mmio_count[I915_NUM_ENGINES];
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| D | debugfs.c | 150 val &= (1 << I915_NUM_ENGINES) - 1; in vgpu_scan_nonprivbb_set()
164 for (id = 0; id < I915_NUM_ENGINES; id++) { in vgpu_scan_nonprivbb_set()
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| D | sched_policy.c | 470 for (ring_id = 0; ring_id < I915_NUM_ENGINES; ring_id++) { in intel_vgpu_stop_schedule()
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| D | vgpu.c | 327 for (i = 0; i < I915_NUM_ENGINES; i++) in intel_gvt_create_idle_vgpu()
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| D | mmio_context.c | 147 u32 control_table[I915_NUM_ENGINES][GEN9_MOCS_SIZE];
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| D | scheduler.c | 1277 bitmap_zero(s->shadow_ctx_desc_updated, I915_NUM_ENGINES); in intel_vgpu_setup_submission()
1292 bitmap_zero(s->tlb_handle_pending, I915_NUM_ENGINES); in intel_vgpu_setup_submission()
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| D | cmd_parser.c | 579 static const struct decode_info *ring_decode_info[I915_NUM_ENGINES][8] = {
3036 for_each_set_bit(ring, &rings, I915_NUM_ENGINES) { in find_cmd_entry_any_ring()
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| /drivers/gpu/drm/i915/selftests/ |
| D | igt_live_test.h | 20 unsigned int reset_engine[I915_NUM_ENGINES];
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| D | i915_request.c | 836 struct i915_request *request[I915_NUM_ENGINES]; in live_all_engines()
938 struct i915_request *request[I915_NUM_ENGINES] = {}; in live_sequential_engines()
1105 struct smoketest t[I915_NUM_ENGINES]; in live_breadcrumbs_smoketest()
1133 threads = kcalloc(ncpus * I915_NUM_ENGINES, in live_breadcrumbs_smoketest()
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| /drivers/gpu/drm/i915/gt/ |
| D | intel_gt_types.h | 82 struct intel_engine_cs *engine[I915_NUM_ENGINES];
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| D | selftest_timeline.c | 246 return i915_prandom_u32_max_state(I915_NUM_ENGINES, rnd); in random_engine()
512 timelines = kvmalloc_array(NUM_TIMELINES * I915_NUM_ENGINES, in live_hwsp_engine()
588 timelines = kvmalloc_array(NUM_TIMELINES * I915_NUM_ENGINES, in live_hwsp_alternate()
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| D | intel_engine_types.h | 150 I915_NUM_ENGINES enumerator
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| D | mock_engine.c | 242 GEM_BUG_ON(id >= I915_NUM_ENGINES); in mock_engine()
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| D | intel_engine_cs.c | 293 BUILD_BUG_ON(BITS_PER_TYPE(engine->mask) < I915_NUM_ENGINES); in intel_engine_setup()
408 GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES)); in intel_engines_init_mmio()
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| D | selftest_lrc.c | 1510 struct task_struct *tsk[I915_NUM_ENGINES] = {}; in smoke_crescendo()
1511 struct preempt_smoke arg[I915_NUM_ENGINES]; in smoke_crescendo()
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| D | selftest_workarounds.c | 33 } engine[I915_NUM_ENGINES];
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| D | selftest_hangcheck.c | 809 struct active_engine threads[I915_NUM_ENGINES] = {}; in __igt_reset_engines()
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| /drivers/gpu/drm/i915/ |
| D | i915_gpu_error.h | 181 atomic_t reset_engine_count[I915_NUM_ENGINES];
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| D | i915_drv.h | 1350 struct intel_engine_cs *engine[I915_NUM_ENGINES];
1794 (id__) < I915_NUM_ENGINES; \
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| D | intel_device_info.c | 874 BUILD_BUG_ON(BITS_PER_TYPE(intel_engine_mask_t) < I915_NUM_ENGINES); in intel_device_info_runtime_init()
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| D | i915_gem.c | 1259 struct i915_request *requests[I915_NUM_ENGINES] = {}; in __intel_engines_record_defaults()
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| /drivers/gpu/drm/i915/gem/selftests/ |
| D | huge_pages.c | 992 static struct intel_engine_cs *engines[I915_NUM_ENGINES]; in igt_write_huge()
1032 order = i915_random_order(n * I915_NUM_ENGINES, &prng); in igt_write_huge()
1048 i = (i + 1) % (n * I915_NUM_ENGINES); in igt_write_huge()
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| /drivers/gpu/drm/i915/gt/uc/ |
| D | intel_guc_submission.c | 1137 I915_NUM_ENGINES > GUC_WQ_SIZE); in intel_guc_submission_enable()
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| /drivers/gpu/drm/i915/gem/ |
| D | i915_gem_context.c | 289 e = kzalloc(struct_size(e, engines, I915_NUM_ENGINES), GFP_KERNEL); in default_engines()
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