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Searched refs:LCD_SPU_DMA_CTRL0 (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/armada/
Darmada_crtc.c164 base + LCD_SPU_DMA_CTRL0); in armada_drm_update_gamma()
166 armada_updatel(0, CFG_GAMMA_ENA, base + LCD_SPU_DMA_CTRL0); in armada_drm_update_gamma()
287 base + LCD_SPU_DMA_CTRL0); in armada_drm_crtc_irq()
639 armada_updatel(0, CFG_HWC_ENA, dcrtc->base + LCD_SPU_DMA_CTRL0); in armada_drm_crtc_cursor_update()
662 armada_updatel(0, CFG_HWC_ENA, dcrtc->base + LCD_SPU_DMA_CTRL0); in armada_drm_crtc_cursor_update()
957 armada_updatel(CFG_ARBFAST_ENA, 0, dcrtc->base + LCD_SPU_DMA_CTRL0); in armada_drm_crtc_create()
Darmada_plane.c239 LCD_SPU_DMA_CTRL0); in armada_drm_primary_plane_atomic_update()
265 armada_reg_queue_mod(regs, idx, 0, CFG_GRA_ENA, LCD_SPU_DMA_CTRL0); in armada_drm_primary_plane_atomic_disable()
Darmada_hw.h60 LCD_SPU_DMA_CTRL0 = 0x0190, enumerator
Darmada_overlay.c169 LCD_SPU_DMA_CTRL0); in armada_drm_overlay_plane_atomic_update()
235 armada_reg_queue_mod(regs, idx, 0, CFG_DMA_ENA, LCD_SPU_DMA_CTRL0); in armada_drm_overlay_plane_atomic_disable()
/drivers/video/fbdev/
Dpxa168fb.c301 x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0); in set_dma_control0()
326 writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL0); in set_dma_control0()
789 data = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0); in pxa168fb_remove()
791 writel(data, fbi->reg_base + LCD_SPU_DMA_CTRL0); in pxa168fb_remove()
Dpxa168fb.h208 #define LCD_SPU_DMA_CTRL0 0x0190 macro
/drivers/video/fbdev/mmp/hw/
Dmmp_ctrl.h126 LCD_PN2_CTRL0) : LCD_SPU_DMA_CTRL0)
417 #define LCD_SPU_DMA_CTRL0 0x0190 macro