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Searched refs:MC_SEQ_PMG_CMD_MRS_LP (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/radeon/
Dbtcd.h154 #define MC_SEQ_PMG_CMD_MRS_LP 0x2a88 macro
Dbtc_dpm.c1889 *out_reg = MC_SEQ_PMG_CMD_MRS_LP >> 2; in btc_check_s0_mc_reg_index()
1942 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in btc_set_mc_special_registers()
2040 WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); in btc_initialize_mc_reg_table()
Dnid.h812 #define MC_SEQ_PMG_CMD_MRS_LP 0x2a88 macro
Dsid.h580 #define MC_SEQ_PMG_CMD_MRS_LP 0x2a88 macro
Dcikd.h705 #define MC_SEQ_PMG_CMD_MRS_LP 0x2a88 macro
Dni_dpm.c2734 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ni_set_mc_special_registers()
2801 *out_reg = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ni_check_s0_mc_reg_index()
2888 WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); in ni_initialize_mc_reg_table()
Devergreend.h330 #define MC_SEQ_PMG_CMD_MRS_LP 0x2a88 macro
Dsi_dpm.c5381 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in si_set_mc_special_registers()
5459 *out_reg = MC_SEQ_PMG_CMD_MRS_LP >> 2; in si_check_s0_mc_reg_index()
5550 WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); in si_initialize_mc_reg_table()
Dci_dpm.c4361 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ci_set_mc_special_registers()
4458 *out_reg = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ci_check_s0_mc_reg_index()
4647 WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); in ci_initialize_mc_reg_table()
Dcypress_dpm.c1008 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in cypress_set_mc_reg_address_table()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h582 #define MC_SEQ_PMG_CMD_MRS_LP 0xAA2 macro
Dsi_dpm.c5840 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP; in si_set_mc_special_registers()
5913 *out_reg = MC_SEQ_PMG_CMD_MRS_LP; in si_check_s0_mc_reg_index()
6004 WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); in si_initialize_mc_reg_table()