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Searched refs:MDIO_START (Results 1 – 7 of 7) sorted by relevance

/drivers/net/ethernet/qualcomm/emac/
Demac-phy.c26 #define MDIO_START BIT(23) macro
55 MDIO_START | MDIO_RD_NWR; in emac_mdio_read()
60 !(reg & (MDIO_START | MDIO_BUSY)), in emac_mdio_read()
79 MDIO_START; in emac_mdio_write()
84 !(reg & (MDIO_START | MDIO_BUSY)), in emac_mdio_write()
/drivers/net/ethernet/atheros/atl1e/
Datl1e_hw.c206 MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | in atl1e_read_phy_reg()
216 if (!(val & (MDIO_START | MDIO_BUSY))) in atl1e_read_phy_reg()
220 if (!(val & (MDIO_START | MDIO_BUSY))) { in atl1e_read_phy_reg()
242 MDIO_START | in atl1e_write_phy_reg()
251 if (!(val & (MDIO_START | MDIO_BUSY))) in atl1e_write_phy_reg()
256 if (!(val & (MDIO_START | MDIO_BUSY))) in atl1e_write_phy_reg()
392 if (!(val & (MDIO_START | MDIO_BUSY))) in atl1e_phy_commit()
396 if (0 != (val & (MDIO_START | MDIO_BUSY))) { in atl1e_phy_commit()
Datl1e_hw.h223 #define MDIO_START 0x800000 /* Write 1 to initiate the MDIO master. And this … macro
/drivers/net/ethernet/atheros/atlx/
Datl2.c2497 MDIO_START | in atl2_read_phy_reg()
2508 if (!(val & (MDIO_START | MDIO_BUSY))) in atl2_read_phy_reg()
2512 if (!(val & (MDIO_START | MDIO_BUSY))) { in atl2_read_phy_reg()
2534 MDIO_START | in atl2_write_phy_reg()
2543 if (!(val & (MDIO_START | MDIO_BUSY))) in atl2_write_phy_reg()
2549 if (!(val & (MDIO_START | MDIO_BUSY))) in atl2_write_phy_reg()
2647 if (!(val & (MDIO_START | MDIO_BUSY))) in atl2_phy_commit()
2651 if (0 != (val & (MDIO_START | MDIO_BUSY))) { in atl2_phy_commit()
Datlx.h163 #define MDIO_START 0x800000 macro
Datl1.c348 MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 << in atl1_read_phy_reg()
356 if (!(val & (MDIO_START | MDIO_BUSY))) in atl1_read_phy_reg()
359 if (!(val & (MDIO_START | MDIO_BUSY))) { in atl1_read_phy_reg()
597 MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT; in atl1_write_phy_reg()
604 if (!(val & (MDIO_START | MDIO_BUSY))) in atl1_write_phy_reg()
608 if (!(val & (MDIO_START | MDIO_BUSY))) in atl1_write_phy_reg()
677 if (!(val & (MDIO_START | MDIO_BUSY))) in atl1_phy_reset()
681 if ((val & (MDIO_START | MDIO_BUSY)) != 0) { in atl1_phy_reset()
/drivers/net/ethernet/hisilicon/
Dhix5hd2_gmac.c47 #define MDIO_START BIT(20) macro
49 #define MDIO_READ (BIT(17) | MDIO_START)
50 #define MDIO_WRITE (BIT(16) | MDIO_START)
923 for (i = 0; readl_relaxed(base + MDIO_SINGLE_CMD) & MDIO_START; i++) { in hix5hd2_mdio_wait_ready()