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Searched refs:MLX4_EQ_ASYNC (Results 1 – 4 of 4) sorted by relevance

/drivers/net/ethernet/mellanox/mlx4/
Deq.c1223 if (i == MLX4_EQ_ASYNC) { in mlx4_init_eq_table()
1226 0, &priv->eq_table.eq[MLX4_EQ_ASYNC]); in mlx4_init_eq_table()
1256 i + 1 - !!(i > MLX4_EQ_ASYNC) : 0, in mlx4_init_eq_table()
1267 MLX4_EQ_ASYNC * MLX4_IRQNAME_SIZE, in mlx4_init_eq_table()
1272 MLX4_EQ_ASYNC * MLX4_IRQNAME_SIZE; in mlx4_init_eq_table()
1274 err = request_irq(priv->eq_table.eq[MLX4_EQ_ASYNC].irq, in mlx4_init_eq_table()
1276 priv->eq_table.eq + MLX4_EQ_ASYNC); in mlx4_init_eq_table()
1280 priv->eq_table.eq[MLX4_EQ_ASYNC].have_irq = 1; in mlx4_init_eq_table()
1295 priv->eq_table.eq[MLX4_EQ_ASYNC].eqn); in mlx4_init_eq_table()
1298 priv->eq_table.eq[MLX4_EQ_ASYNC].eqn, err); in mlx4_init_eq_table()
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Dcq.c451 priv->eq_table.eq[MLX4_EQ_ASYNC].irq) in mlx4_cq_free()
452 synchronize_irq(priv->eq_table.eq[MLX4_EQ_ASYNC].irq); in mlx4_cq_free()
Dmain.c2770 priv->eq_table.eq[MLX4_EQ_ASYNC].irq); in mlx4_setup_hca()
2774 priv->eq_table.eq[MLX4_EQ_ASYNC].irq); in mlx4_setup_hca()
2913 requested_cpu = eqn - off - !!(eqn > MLX4_EQ_ASYNC); in mlx4_init_affinity_hint()
2955 if (nreq < 0 || nreq < MLX4_EQ_ASYNC) { in mlx4_enable_msi_x()
2962 priv->eq_table.eq[MLX4_EQ_ASYNC].irq = entries[0].vector; in mlx4_enable_msi_x()
2963 bitmap_zero(priv->eq_table.eq[MLX4_EQ_ASYNC].actv_ports.ports, in mlx4_enable_msi_x()
2967 if (i == MLX4_EQ_ASYNC) in mlx4_enable_msi_x()
2971 entries[i + 1 - !!(i > MLX4_EQ_ASYNC)].vector; in mlx4_enable_msi_x()
2998 !!((i + 1) > MLX4_EQ_ASYNC)) in mlx4_enable_msi_x()
3014 BUG_ON(MLX4_EQ_ASYNC >= 2); in mlx4_enable_msi_x()
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Dmlx4.h292 #define MLX4_EQ_ASYNC 0 macro
294 !!((int)(vector) >= MLX4_EQ_ASYNC))
296 !!((int)(vector) >= MLX4_EQ_ASYNC))