Searched refs:MLX5E_NUM_INDIR_TIRS (Results 1 – 8 of 8) sorted by relevance
76 MLX5E_NUM_INDIR_TIRS = MLX5E_TT_ANY, enumerator231 u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
809 return MLX5E_NUM_INDIR_TIRS; in flow_type_to_traffic_type()822 if (tt == MLX5E_NUM_INDIR_TIRS) in mlx5e_set_rss_hash_opt()873 if (tt == MLX5E_NUM_INDIR_TIRS) in mlx5e_get_rss_hash_opt()
784 u32 rx_hash_fields[MLX5E_NUM_INDIR_TIRS];833 struct mlx5e_tir indir_tir[MLX5E_NUM_INDIR_TIRS];834 struct mlx5e_tir inner_indir_tir[MLX5E_NUM_INDIR_TIRS];
2626 static const struct mlx5e_tirc_config tirc_default_config[MLX5E_NUM_INDIR_TIRS] = {2733 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { in mlx5e_modify_tirs_hash()2744 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { in mlx5e_modify_tirs_hash()2775 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { in mlx5e_modify_tirs_lro()3289 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { in mlx5e_create_indirect_tirs()3304 for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++) { in mlx5e_create_indirect_tirs()3374 for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++) in mlx5e_destroy_indirect_tirs()3380 for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++) in mlx5e_destroy_indirect_tirs()4744 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) in mlx5e_build_rss_params()
1542 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) in mlx5e_create_flow_steering()1553 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) in mlx5e_create_flow_steering()
164 u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];542 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { in mlx5e_hairpin_create_indirect_tirs()572 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) in mlx5e_hairpin_destroy_indirect_tirs()586 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) in mlx5e_hairpin_set_ttc_params()
1526 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) in mlx5e_create_rep_ttc_table()
323 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) in mlx5i_create_flow_steering()334 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) in mlx5i_create_flow_steering()