Searched refs:NV03_PFIFO_CACHE1_PUSH1 (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
D | dmanv04.c | 91 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & mask; in nv04_fifo_dma_fini() 115 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, mask); in nv04_fifo_dma_fini()
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D | nv17.c | 70 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->base.nr - 1); in nv17_fifo_init()
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D | nv40.c | 101 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->base.nr - 1); in nv40_fifo_init()
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D | regsnv04.h | 36 #define NV03_PFIFO_CACHE1_PUSH1 0x00003204 macro
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D | nv04.c | 252 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & (fifo->base.nr - 1); in nv04_fifo_intr() 317 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->base.nr - 1); in nv04_fifo_init()
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/drivers/gpu/drm/nouveau/ |
D | nouveau_reg.h | 472 #define NV03_PFIFO_CACHE1_PUSH1 0x00003204 macro
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