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Searched refs:OWN (Results 1 – 14 of 14) sorted by relevance

/drivers/staging/rtl8192e/rtl8192e/
Dr8190P_def.h213 u8 OWN:1; member
252 u8 OWN:1; member
278 u8 OWN:1; member
Drtl_core.c546 pdesc->OWN = 1; in _rtl92e_prepare_beacon()
1674 if (entry->OWN) in _rtl92e_tx_isr()
1756 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) { in _rtl92e_tx()
1771 pdesc->OWN = 1; in _rtl92e_tx()
1818 entry->OWN = 1; in _rtl92e_alloc_rx_ring()
1893 entry->OWN = 1; in rtl92e_reset_desc_ring()
2027 if (pdesc->OWN) in _rtl92e_rx_normal()
2096 pdesc->OWN = 1; in _rtl92e_rx_normal()
Dr8192E_dev.c1309 entry->OWN = 1; in rtl92e_fill_tx_cmd_desc()
/drivers/staging/rtl8712/
Drtl8712_xmit.h52 #define OWN BIT(31) macro
Drtl8712_xmit.c259 ptx_desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in r8712_construct_txaggr_cmd_desc()
439 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in update_txdesc()
Drtl8712_cmd.c348 pdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in r8712_cmd_thread()
/drivers/staging/rtl8188eu/include/
Drtl8188e_xmit.h51 #define OWN BIT(31) macro
/drivers/net/ethernet/sis/
Dsis900.h198 OWN = 0x80000000, MORE = 0x40000000, INTR = 0x20000000, enumerator
Dsis900.c1625 sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len); in sis900_start_xmit()
1744 while (rx_status & OWN) { in sis900_rx()
1901 if (tx_status & OWN) { in sis900_finish_xmit()
/drivers/staging/rtl8188eu/hal/
Drtl8188eu_xmit.c60 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */ in rtl8188e_fill_fake_txdesc()
183 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in update_txdesc()
/drivers/staging/rtl8192u/
Dr8192U.h188 u8 OWN:1; member
226 u8 OWN:1; member
Dr8192U_core.c1217 pdesc->OWN = 1; in rtl819xU_tx_cmd()
1539 tx_desc->OWN = 1; in rtl8192_tx()
/drivers/net/ethernet/amd/xgbe/
Dxgbe-dev.c1372 return !XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN); in xgbe_tx_complete()
1480 XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN, 1); in xgbe_rx_desc_reset()
1800 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1846 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1880 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1920 if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN)) in xgbe_dev_read()
/drivers/staging/rtl8723bs/include/
Drtl8723b_xmit.h30 #define OWN BIT(31) macro