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Searched refs:PP_SCLK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dmxgpu_ai.c170 case PP_SCLK: in xgpu_ai_get_pp_clk()
204 (type == PP_SCLK)? "SCLK" : "MCLK"); in xgpu_ai_get_pp_clk()
Damdgpu_virt.c409 adev->virt.ops->get_pp_clk(adev, PP_SCLK, buf); in amdgpu_virt_get_sclk()
Damdgpu_pm.c841 return adev->virt.ops->get_pp_clk(adev, PP_SCLK, buf); in amdgpu_get_pp_dpm_sclk()
846 return amdgpu_dpm_print_clock_levels(adev, PP_SCLK, buf); in amdgpu_get_pp_dpm_sclk()
907 ret = amdgpu_dpm_force_clock_level(adev, PP_SCLK, mask); in amdgpu_set_pp_dpm_sclk()
/drivers/gpu/drm/amd/include/
Dkgd_pp_interface.h92 PP_SCLK, enumerator
/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu10_hwmgr.c842 case PP_SCLK: in smu10_force_clock_level()
890 case PP_SCLK: in smu10_print_clock_levels()
Dvega12_hwmgr.c1658 vega12_force_clock_level(hwmgr, PP_SCLK, 1 << sclk_mask); in vega12_dpm_force_dpm_level()
1888 case PP_SCLK: in vega12_force_clock_level()
2094 case PP_SCLK: in vega12_print_clock_levels()
Dsmu8_hwmgr.c1497 case PP_SCLK: in smu8_force_clock_level()
1521 case PP_SCLK: in smu8_print_clock_levels()
Dsmu7_hwmgr.c2830 smu7_force_clock_level(hwmgr, PP_SCLK, 1<<sclk_mask); in smu7_force_dpm_level()
4405 case PP_SCLK: in smu7_force_clock_level()
4452 case PP_SCLK: in smu7_print_clock_levels()
4991 smu7_force_clock_level(hwmgr, PP_SCLK, 3 << (level-1)); in smu7_patch_compute_profile_mode()
4994 smu7_force_clock_level(hwmgr, PP_SCLK, data->dpm_level_enable_mask.sclk_dpm_enable_mask); in smu7_patch_compute_profile_mode()
Dvega20_hwmgr.c2514 case PP_SCLK: in vega20_force_clock_level()
2695 vega20_force_clock_level(hwmgr, PP_SCLK, 1 << sclk_mask); in vega20_dpm_force_dpm_level()
3270 case PP_SCLK: in vega20_print_clock_levels()
Dvega10_hwmgr.c4084 case PP_SCLK: in vega10_force_clock_level()
4165 vega10_force_clock_level(hwmgr, PP_SCLK, 1<<sclk_mask); in vega10_dpm_force_dpm_level()
4481 case PP_SCLK: in vega10_print_clock_levels()