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Searched refs:QM_RAS_CE_ENABLE (Results 1 – 1 of 1) sorted by relevance

/drivers/crypto/hisilicon/
Dqm.c133 #define QM_RAS_CE_ENABLE 0x1000ec macro
1000 writel(ce, qm->io_base + QM_RAS_CE_ENABLE); in qm_hw_error_init_v2()