Searched refs:REG_A6XX_GMU_DCVS_PERF_SETTING (Results 1 – 2 of 2) sorted by relevance
/drivers/gpu/drm/msm/adreno/ | ||
D | a6xx_gmu.xml.h | 98 #define REG_A6XX_GMU_DCVS_PERF_SETTING 0x000023fd macro |
D | a6xx_gmu.c | 112 gmu_write(gmu, REG_A6XX_GMU_DCVS_PERF_SETTING, in __a6xx_gmu_set_freq() |