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Searched refs:REG_CTRL (Results 1 – 10 of 10) sorted by relevance

/drivers/pwm/
Dpwm-vt8500.c31 #define REG_CTRL(pwm) (((pwm) << 4) + 0x00) macro
117 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_config()
119 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_config()
138 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_enable()
140 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_enable()
151 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_disable()
153 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_disable()
166 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_set_polarity()
173 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_set_polarity()
/drivers/video/backlight/
Dlm3630a_bl.c18 #define REG_CTRL 0x00 macro
98 rval |= lm3630a_update(pchip, REG_CTRL, 0x14, pdata->leda_ctrl); in lm3630a_chip_init()
99 rval |= lm3630a_update(pchip, REG_CTRL, 0x0B, pdata->ledb_ctrl); in lm3630a_chip_init()
136 rval = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_isr_func()
195 ret = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_bank_a_update_status()
202 ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDA_ENABLE, 0); in lm3630a_bank_a_update_status()
204 ret |= lm3630a_update(pchip, REG_CTRL, in lm3630a_bank_a_update_status()
234 rval = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_bank_a_get_brightness()
272 ret = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_bank_b_update_status()
279 ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDB_ENABLE, 0); in lm3630a_bank_b_update_status()
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/drivers/i2c/busses/
Di2c-meson.c21 #define REG_CTRL 0x00 macro
143 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK, in meson_i2c_set_clk_div()
146 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK, in meson_i2c_set_clk_div()
224 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); in meson_i2c_irq()
225 ctrl = readl(i2c->regs + REG_CTRL); in meson_i2c_irq()
262 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); in meson_i2c_irq()
296 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_ACK_IGNORE, flags); in meson_i2c_xfer_msg()
306 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); in meson_i2c_xfer_msg()
319 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); in meson_i2c_xfer_msg()
427 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); in meson_i2c_probe()
Di2c-efm32.c17 #define REG_CTRL 0x00 macro
419 efm32_i2c_write32(ddata, REG_CTRL, REG_CTRL_EN | in efm32_i2c_probe()
/drivers/phy/amlogic/
Dphy-meson8b-usb2.c25 #define REG_CTRL 0x04 macro
162 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK, in phy_meson8b_usb2_power_on()
165 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_FSEL_MASK, in phy_meson8b_usb2_power_on()
169 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_POWER_ON_RESET, in phy_meson8b_usb2_power_on()
172 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_POWER_ON_RESET, 0); in phy_meson8b_usb2_power_on()
175 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_SOF_TOGGLE_OUT, in phy_meson8b_usb2_power_on()
/drivers/mfd/
Dti_am335x_tscadc.c227 regmap_write(tscadc->regmap, REG_CTRL, ctrl); in ti_tscadc_probe()
241 regmap_write(tscadc->regmap, REG_CTRL, ctrl); in ti_tscadc_probe()
310 regmap_read(tscadc->regmap, REG_CTRL, &ctrl); in tscadc_suspend()
313 regmap_write(tscadc->regmap, REG_CTRL, ctrl); in tscadc_suspend()
329 regmap_write(tscadc->regmap, REG_CTRL, ctrl); in tscadc_resume()
339 regmap_write(tscadc->regmap, REG_CTRL, ctrl); in tscadc_resume()
/drivers/video/fbdev/
Dxilinxfb.c63 #define REG_CTRL 1 macro
235 xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); in xilinx_fb_blank()
243 xilinx_fb_out32(drvdata, REG_CTRL, 0); in xilinx_fb_blank()
314 xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); in xilinxfb_assign()
372 xilinx_fb_out32(drvdata, REG_CTRL, 0); in xilinxfb_assign()
396 xilinx_fb_out32(drvdata, REG_CTRL, 0); in xilinxfb_release()
/drivers/iio/adc/
Dti_am335x_adc.c186 config = tiadc_readl(adc_dev, REG_CTRL); in tiadc_irq_h()
188 tiadc_writel(adc_dev, REG_CTRL, config); in tiadc_irq_h()
200 tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB)); in tiadc_irq_h()
701 idle = tiadc_readl(adc_dev, REG_CTRL); in tiadc_suspend()
703 tiadc_writel(adc_dev, REG_CTRL, (idle | in tiadc_suspend()
716 restore = tiadc_readl(adc_dev, REG_CTRL); in tiadc_resume()
718 tiadc_writel(adc_dev, REG_CTRL, restore); in tiadc_resume()
/drivers/spi/
Dspi-meson-spifc.c24 #define REG_CTRL 0x08 macro
254 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, 0); in meson_spifc_transfer_one()
264 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, in meson_spifc_transfer_one()
Dspi-efm32.c22 #define REG_CTRL 0x00 macro
125 (spi->mode & SPI_CPOL ? REG_CTRL_CLKPOL : 0), REG_CTRL); in efm32_spi_setup_transfer()