Searched refs:REQ (Results 1 – 7 of 7) sorted by relevance
310 # define REQ (1 << 0) macro
1477 #define REQ 0x00000001 macro
5858 tmp = REQ | MESSAGE(MSG_ENTER_RLC_SAFE_MODE); in cik_enter_rlc_safe_mode()5869 if ((RREG32(RLC_GPR_REG2) & REQ) == 0) in cik_enter_rlc_safe_mode()5879 tmp = REQ | MESSAGE(MSG_EXIT_RLC_SAFE_MODE); in cik_exit_rlc_safe_mode()
846 * target to assert REQ before checking MSG, C/D and I/O for913 * 800ns dead time between command phase and the REQ1394 * Don't ignore persistent REQ assertions just because1398 * count REQ while we are waiting for it to fall during1400 * sequencer instruction takes ~25ns, so the REQ must1402 * REQ.1429 * and that REQ is already set when inb_first is called. inb_{first,next}1867 * disabling SCSIEN until we see the first REQ from the2186 * L_Q context associated with this REQ (REQ occurs immediately after a
413 * driving REQ on the bus for the next byte.417 * Drive REQ on the bus by enabling SCSI PIO.422 /* Prevent our read from triggering another REQ */657 * target to assert REQ before checking MSG, C/D and I/O for1970 * and that REQ is already set when inb_first is called. inb_{first,next}
3217 * DSP REQ Control
63 #define REQ BIT(2) macro