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Searched refs:RVU_AF_PFFLR_INT_ENA_W1S (Results 1 – 2 of 2) sorted by relevance

/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_reg.h41 #define RVU_AF_PFFLR_INT_ENA_W1S (0x28b0) macro
Drvu.c1848 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S, BIT_ULL(pf)); in rvu_flr_handler()
2067 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S, in rvu_register_interrupts()