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Searched refs:SATA_PHY0_CTLL (Results 1 – 1 of 1) sorted by relevance

/drivers/phy/hisilicon/
Dphy-hix5hd2-sata.c15 #define SATA_PHY0_CTLL 0xa0 macro
81 val = readl_relaxed(priv->base + SATA_PHY0_CTLL); in hix5hd2_sata_phy_init()
85 writel_relaxed(val, priv->base + SATA_PHY0_CTLL); in hix5hd2_sata_phy_init()
88 writel_relaxed(val, priv->base + SATA_PHY0_CTLL); in hix5hd2_sata_phy_init()