Searched refs:SH_MEM_BASES (Results 1 – 5 of 5) sorted by relevance
/drivers/gpu/drm/radeon/ |
D | cik_sdma.c | 967 radeon_ring_write(ring, SH_MEM_BASES >> 2); in cik_dma_vm_flush()
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D | cikd.h | 1163 #define SH_MEM_BASES 0x8C28 macro
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D | cik.c | 5524 WREG32(SH_MEM_BASES, 0); in cik_pcie_gart_enable() 5721 radeon_ring_write(ring, SH_MEM_BASES >> 2); in cik_vm_flush()
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/drivers/gpu/drm/amd/amdgpu/ |
D | gfx_v10_0.c | 1755 tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE, in gfx_v10_0_constants_init() 1757 tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE, in gfx_v10_0_constants_init()
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D | gfx_v9_0.c | 2529 tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE, in gfx_v9_0_constants_init() 2531 tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE, in gfx_v9_0_constants_init()
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