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Searched refs:SMC_RAM_END (Results 1 – 19 of 19) sorted by relevance

/drivers/gpu/drm/amd/powerplay/smumgr/
Dvegam_smumgr.c236 &tmp, SMC_RAM_END); in vegam_process_firmware_header()
246 &tmp, SMC_RAM_END); in vegam_process_firmware_header()
258 &tmp, SMC_RAM_END); in vegam_process_firmware_header()
266 &tmp, SMC_RAM_END); in vegam_process_firmware_header()
276 &tmp, SMC_RAM_END); in vegam_process_firmware_header()
286 &tmp, SMC_RAM_END); in vegam_process_firmware_header()
955 (uint32_t)array_size, SMC_RAM_END); in vegam_populate_all_graphic_levels()
1077 (uint32_t)array_size, SMC_RAM_END); in vegam_populate_all_memory_levels()
1312 SMC_RAM_END); in vegam_program_memory_timing_parameters()
1646 &tmp, SMC_RAM_END); in vegam_populate_avfs_parameters()
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Dpolaris10_smumgr.c512 (uint32_t *)&temp, SMC_RAM_END)) in polaris10_populate_dw8()
596 &pm_fuse_table_offset, SMC_RAM_END)) in polaris10_populate_pm_fuses()
638 (sizeof(struct SMU74_Discrete_PmFuses) - 92), SMC_RAM_END)) in polaris10_populate_pm_fuses()
1065 (uint32_t)array_size, SMC_RAM_END); in polaris10_populate_all_graphic_levels()
1169 (uint32_t)array_size, SMC_RAM_END); in polaris10_populate_all_memory_levels()
1388 SMC_RAM_END); in polaris10_program_memory_timing_parameters()
1750 &tmp, SMC_RAM_END); in polaris10_populate_avfs_parameters()
1756 SMC_RAM_END); in polaris10_populate_avfs_parameters()
1760 &tmp, SMC_RAM_END); in polaris10_populate_avfs_parameters()
1765 SMC_RAM_END); in polaris10_populate_avfs_parameters()
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Diceland_smumgr.c344 (uint32_t *)&temp, SMC_RAM_END)) in iceland_populate_dw8()
445 &pm_fuse_table_offset, SMC_RAM_END)) in iceland_populate_pm_fuses()
498 sizeof(struct SMU71_Discrete_PmFuses), SMC_RAM_END)) in iceland_populate_pm_fuses()
1039 SMC_RAM_END); in iceland_populate_all_graphic_levels()
1390 SMC_RAM_END); in iceland_populate_all_memory_levels()
1640 SMC_RAM_END in iceland_program_memory_timing_parameters()
1799 SMC_RAM_END); in iceland_update_and_upload_mc_reg_table()
1817 (uint8_t *)&smu_data->mc_regs, sizeof(SMU71_Discrete_MCRegisters), SMC_RAM_END); in iceland_populate_initial_mc_reg_table()
2061 SMC_RAM_END); in iceland_init_smc_table()
2071 SMC_RAM_END); in iceland_init_smc_table()
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Dfiji_smumgr.c614 (uint32_t *)&temp, SMC_RAM_END)) in fiji_populate_dw8()
701 &pm_fuse_table_offset, SMC_RAM_END)) in fiji_populate_pm_fuses()
748 sizeof(struct SMU73_Discrete_PmFuses), SMC_RAM_END)) in fiji_populate_pm_fuses()
1091 (uint32_t)array_size, SMC_RAM_END); in fiji_populate_all_graphic_levels()
1270 (uint32_t)array_size, SMC_RAM_END); in fiji_populate_all_memory_levels()
1554 SMC_RAM_END); in fiji_program_memory_timing_parameters()
1882 smu_data->smu7_data.arb_table_start, &tmp, SMC_RAM_END); in fiji_init_arb_table_index()
1891 smu_data->smu7_data.arb_table_start, tmp, SMC_RAM_END); in fiji_init_arb_table_index()
2114 SMC_RAM_END); in fiji_init_smc_table()
2219 SMC_RAM_END); in fiji_thermal_setup_fan_table()
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Dtonga_smumgr.c782 SMC_RAM_END); in tonga_populate_all_graphic_levels()
1138 SMC_RAM_END); in tonga_populate_all_memory_levels()
1515 SMC_RAM_END in tonga_program_memory_timing_parameters()
1813 smu_data->smu7_data.arb_table_start, &tmp, SMC_RAM_END); in tonga_init_arb_table_index()
1822 smu_data->smu7_data.arb_table_start, tmp, SMC_RAM_END); in tonga_init_arb_table_index()
1919 (uint32_t *)&temp, SMC_RAM_END)) in tonga_populate_dw8()
2005 &pm_fuse_table_offset, SMC_RAM_END)) in tonga_populate_pm_fuses()
2055 sizeof(struct SMU72_Discrete_PmFuses), SMC_RAM_END)) in tonga_populate_pm_fuses()
2181 SMC_RAM_END); in tonga_update_and_upload_mc_reg_table()
2201 (uint8_t *)&smu_data->mc_regs, sizeof(SMU72_Discrete_MCRegisters), SMC_RAM_END); in tonga_populate_initial_mc_reg_table()
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Dci_smumgr.c63 #define SMC_RAM_END 0x40000 macro
505 SMC_RAM_END); in ci_populate_all_graphic_levels()
549 (uint32_t *)&temp, SMC_RAM_END)) in ci_populate_dw8()
682 &pm_fuse_table_offset, SMC_RAM_END)) { in ci_populate_pm_fuses()
708 sizeof(struct SMU7_Discrete_PmFuses), SMC_RAM_END); in ci_populate_pm_fuses()
1343 SMC_RAM_END); in ci_populate_all_memory_levels()
1676 SMC_RAM_END in ci_program_memory_timing_parameters()
1831 SMC_RAM_END); in ci_update_and_upload_mc_reg_table()
1849 (uint8_t *)&smu_data->mc_regs, sizeof(SMU7_Discrete_MCRegisters), SMC_RAM_END); in ci_populate_initial_mc_reg_table()
2105 SMC_RAM_END); in ci_init_smc_table()
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Dpolaris10_smumgr.h33 #define SMC_RAM_END 0x40000 macro
Dvegam_smumgr.h32 #define SMC_RAM_END 0x40000 macro
Dsmu7_smumgr.h30 #define SMC_RAM_END 0x40000 macro
/drivers/gpu/drm/radeon/
Dbtc_dpm.c47 #define SMC_RAM_END 0x8000 macro
2699 pi->sram_end = SMC_RAM_END; in btc_dpm_init()
Dcypress_dpm.c34 #define SMC_RAM_END 0x8000 macro
2138 pi->sram_end = SMC_RAM_END; in cypress_dpm_init()
Drv770_dpm.c45 #define SMC_RAM_END 0xC000 macro
2425 pi->sram_end = SMC_RAM_END; in rv770_dpm_init()
Dkv_dpm.c36 #define SMC_RAM_END 0x40000 macro
2744 pi->sram_end = SMC_RAM_END; in kv_dpm_init()
Dni_dpm.c41 #define SMC_RAM_END 0xC000 macro
4195 pi->sram_end = SMC_RAM_END; in ni_dpm_init()
Dsi_dpm.c41 #define SMC_RAM_END 0x20000 macro
7056 si_pi->sram_end = SMC_RAM_END; in si_dpm_init()
Dci_dpm.c42 #define SMC_RAM_END 0x40000 macro
5744 pi->sram_end = SMC_RAM_END; in ci_dpm_init()
/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu10_hwmgr.c44 #define SMC_RAM_END 0x40000 macro
/drivers/gpu/drm/amd/amdgpu/
Dkv_dpm.c42 #define SMC_RAM_END 0x40000 macro
2812 pi->sram_end = SMC_RAM_END; in kv_dpm_init()
Dsi_dpm.c46 #define SMC_RAM_END 0x20000 macro
7446 si_pi->sram_end = SMC_RAM_END; in si_dpm_init()