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Searched refs:SMU_MCLK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/powerplay/
Drenoir_ppt.h39 case SMU_MCLK: \
Dnavi10_ppt.c695 case SMU_MCLK: in navi10_print_clk_levels()
761 case SMU_MCLK: in navi10_force_clk_levels()
801 ret = smu_get_dpm_freq_range(smu, SMU_MCLK, &min_mclk_freq, NULL); in navi10_populate_umd_state_clk()
898 SMU_MCLK, in navi10_force_dpm_limit_value() enumerator
925 SMU_MCLK, in navi10_unforce_dpm_levels() enumerator
1236 ret = smu_get_dpm_level_count(smu, SMU_MCLK, &level_count); in navi10_get_profiling_clk_mask()
Drenoir_ppt.c226 case SMU_MCLK: in renoir_print_clk_levels()
Damdgpu_smu.c242 case SMU_MCLK: in smu_get_dpm_freq_range()
319 case SMU_MCLK: in smu_clk_dpm_is_enabled()
1595 smu_force_clk_levels(smu, SMU_MCLK, 1 << mclk_mask); in smu_default_set_performance_level()
Darcturus_ppt.c621 case SMU_MCLK: in arcturus_print_clk_levels()
794 case SMU_MCLK: in arcturus_force_clk_levels()
Dvega20_ppt.c982 case SMU_MCLK: in vega20_print_clk_levels()
1320 case SMU_MCLK: in vega20_force_clk_levels()
1461 case SMU_MCLK: in vega20_get_clock_by_type_with_latency()
/drivers/gpu/drm/amd/powerplay/inc/
Dsmu_types.h192 SMU_MCLK, enumerator
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c164 smu_clk_type = SMU_MCLK; in dc_to_smu_clock_type()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_pm.c927 return smu_print_clk_levels(&adev->smu, SMU_MCLK, buf); in amdgpu_get_pp_dpm_mclk()
952 ret = smu_force_clk_levels(&adev->smu, SMU_MCLK, mask); in amdgpu_set_pp_dpm_mclk()