Home
last modified time | relevance | path

Searched refs:SPLL_REF_DIV (Results 1 – 20 of 20) sorted by relevance

/drivers/gpu/drm/radeon/
Drv740d.h30 #define SPLL_REF_DIV(x) ((x) << 4) macro
Drv730d.h31 #define SPLL_REF_DIV(x) ((x) << 4) macro
Drs780d.h29 # define SPLL_REF_DIV(x) ((x) << 2) macro
Drv740_dpm.c148 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv740_populate_sclk_value()
Drv730_dpm.c79 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv730_populate_sclk_value()
Drv770d.h94 #define SPLL_REF_DIV(x) ((x) << 4) macro
Dnid.h542 #define SPLL_REF_DIV(x) ((x) << 4) macro
Dsid.h89 #define SPLL_REF_DIV(x) ((x) << 4) macro
Dcikd.h252 #define SPLL_REF_DIV(x) ((x) << 5) macro
Devergreend.h78 #define SPLL_REF_DIV(x) ((x) << 4) macro
Dr600d.h1273 # define SPLL_REF_DIV(x) ((x) << 2) macro
Drv770_dpm.c526 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv770_populate_sclk_value()
Dni_dpm.c2030 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in ni_calculate_sclk_params()
Dsi_dpm.c4813 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in si_calculate_sclk_params()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h91 #define SPLL_REF_DIV(x) ((x) << 4) macro
Dsi_dpm.c5275 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in si_calculate_sclk_params()
/drivers/gpu/drm/amd/powerplay/smumgr/
Diceland_smumgr.c826 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div); in iceland_calculate_sclk_params()
Dfiji_smumgr.c888 SPLL_REF_DIV, dividers.uc_pll_ref_div); in fiji_calculate_sclk_params()
Dtonga_smumgr.c569 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div); in tonga_calculate_sclk_params()
Dci_smumgr.c326 SPLL_REF_DIV, dividers.uc_pll_ref_div); in ci_calculate_sclk_params()