Searched refs:TXS (Results 1 – 9 of 9) sorted by relevance
| /drivers/net/wan/ |
| D | hd64570.h | 69 #define TXS 0x17 /* TX Clock Source */ macro
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| D | hd64572.h | 66 #define TXS 0x13d /* TX clock source */ macro
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| D | hd64572.c | 409 sca_out(port->txs, msci + TXS, card); in sca_set_port()
469 sca_out(port->txs, msci + TXS, card); in sca_open()
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| D | hd64570.c | 445 sca_out(port->txs, msci + TXS, card); in sca_set_port()
513 sca_out(port->txs, msci + TXS, card); in sca_open()
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| D | pci200syn.c | 150 sca_out(txs, msci + TXS, card); in pci200_set_iface()
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| D | c101.c | 178 sca_out(txs, MSCI1_OFFSET + TXS, port); in c101_set_iface()
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| D | pc300too.c | 152 sca_out(txs, msci + TXS, card); in pc300_set_iface()
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| D | n2.c | 202 sca_out(txs, msci + TXS, card); in n2_set_iface()
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| /drivers/tty/ |
| D | synclinkmp.c | 332 #define TXS 0x37 macro
4026 write_reg(info, TXS, 0x40); in enable_loopback()
4040 write_reg(info, TXS, 0x00); in enable_loopback()
4086 write_reg(info, TXS, in set_rate()
4087 (unsigned char)((read_reg(info, TXS) & 0xf0) | BRValue)); in set_rate()
4093 write_reg(info, TXS,0); in set_rate()
4434 write_reg(info, TXS, RegValue); in async_mode()
4605 write_reg(info, TXS, RegValue); in hdlc_mode()
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