Searched refs:YCLK_POST_DIV (Results 1 – 17 of 17) sorted by relevance
| /drivers/gpu/drm/radeon/ |
| D | rv740d.h | 52 #define YCLK_POST_DIV(x) ((x) << 17) macro
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| D | rv740_dpm.c | 217 mpll_ad_func_cntl |= YCLK_POST_DIV(dividers.post_div); in rv740_populate_mclk_value()
234 mpll_dq_func_cntl |= YCLK_POST_DIV(dividers.post_div); in rv740_populate_mclk_value()
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| D | rv770d.h | 125 #define YCLK_POST_DIV(x) ((x) << 17) macro
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| D | nid.h | 567 #define YCLK_POST_DIV(x) ((x) << 17) macro
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| D | cypress_dpm.c | 521 mpll_ad_func_cntl |= YCLK_POST_DIV(dividers.post_div); in cypress_populate_mclk_value()
538 mpll_dq_func_cntl |= YCLK_POST_DIV(dividers.post_div); in cypress_populate_mclk_value()
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| D | sid.h | 624 #define YCLK_POST_DIV(x) ((x) << 0) macro
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| D | cikd.h | 747 #define YCLK_POST_DIV(x) ((x) << 0) macro
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| D | rv770_dpm.c | 433 mpll_ad_func_cntl |= YCLK_POST_DIV(postdiv_yclk); in rv770_populate_mclk_value()
461 mpll_dq_func_cntl |= YCLK_POST_DIV(postdiv_yclk); in rv770_populate_mclk_value()
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| D | evergreend.h | 105 #define YCLK_POST_DIV(x) ((x) << 17) macro
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| D | ni_dpm.c | 2203 mpll_ad_func_cntl |= YCLK_POST_DIV(dividers.post_div); in ni_populate_mclk_value()
2220 mpll_dq_func_cntl |= YCLK_POST_DIV(dividers.post_div); in ni_populate_mclk_value()
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| D | si_dpm.c | 4906 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
4911 YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
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| D | ci_dpm.c | 2819 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
2824 YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
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| /drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | iceland_smumgr.c | 1085 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
1092 MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
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| D | tonga_smumgr.c | 834 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, in tonga_calculate_mclk_params()
843 MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, in tonga_calculate_mclk_params()
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| D | ci_smumgr.c | 1058 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
1064 MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | sid.h | 626 #define YCLK_POST_DIV(x) ((x) << 0) macro
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| D | si_dpm.c | 5368 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
5373 YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
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