| /drivers/media/platform/s5p-mfc/ |
| D | s5p_mfc_opr.h | 20 void __iomem *risc_on;
21 void __iomem *risc2host_int;
22 void __iomem *host2risc_int;
23 void __iomem *risc_base_address;
24 void __iomem *mfc_reset;
25 void __iomem *host2risc_command;
26 void __iomem *risc2host_command;
27 void __iomem *mfc_bus_reset_ctrl;
28 void __iomem *firmware_version;
29 void __iomem *instance_id;
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| /drivers/media/platform/s5p-jpeg/ |
| D | jpeg-hw-exynos3250.h | 17 void exynos3250_jpeg_reset(void __iomem *regs);
18 void exynos3250_jpeg_poweron(void __iomem *regs);
19 void exynos3250_jpeg_set_dma_num(void __iomem *regs);
20 void exynos3250_jpeg_clk_set(void __iomem *base);
21 void exynos3250_jpeg_input_raw_fmt(void __iomem *regs, unsigned int fmt);
22 void exynos3250_jpeg_output_raw_fmt(void __iomem *regs, unsigned int fmt);
23 void exynos3250_jpeg_set_y16(void __iomem *regs, bool y16);
24 void exynos3250_jpeg_proc_mode(void __iomem *regs, unsigned int mode);
25 void exynos3250_jpeg_subsampling_mode(void __iomem *regs, unsigned int mode);
26 unsigned int exynos3250_jpeg_get_subsampling_mode(void __iomem *regs);
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| D | jpeg-hw-s5p.h | 26 void s5p_jpeg_reset(void __iomem *regs);
27 void s5p_jpeg_poweron(void __iomem *regs);
28 void s5p_jpeg_input_raw_mode(void __iomem *regs, unsigned long mode);
29 void s5p_jpeg_proc_mode(void __iomem *regs, unsigned long mode);
30 void s5p_jpeg_subsampling_mode(void __iomem *regs, unsigned int mode);
31 unsigned int s5p_jpeg_get_subsampling_mode(void __iomem *regs);
32 void s5p_jpeg_dri(void __iomem *regs, unsigned int dri);
33 void s5p_jpeg_qtbl(void __iomem *regs, unsigned int t, unsigned int n);
34 void s5p_jpeg_htbl_ac(void __iomem *regs, unsigned int t);
35 void s5p_jpeg_htbl_dc(void __iomem *regs, unsigned int t);
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| D | jpeg-hw-exynos4.h | 13 void exynos4_jpeg_sw_reset(void __iomem *base);
14 void exynos4_jpeg_set_enc_dec_mode(void __iomem *base, unsigned int mode);
15 void __exynos4_jpeg_set_img_fmt(void __iomem *base, unsigned int img_fmt,
17 void __exynos4_jpeg_set_enc_out_fmt(void __iomem *base, unsigned int out_fmt,
19 void exynos4_jpeg_set_enc_tbl(void __iomem *base);
20 void exynos4_jpeg_set_interrupt(void __iomem *base, unsigned int version);
21 unsigned int exynos4_jpeg_get_int_status(void __iomem *base);
22 void exynos4_jpeg_set_huf_table_enable(void __iomem *base, int value);
23 void exynos4_jpeg_set_sys_int_enable(void __iomem *base, int value);
24 void exynos4_jpeg_set_stream_buf_address(void __iomem *base,
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| D | jpeg-hw-exynos3250.c | 18 void exynos3250_jpeg_reset(void __iomem *regs) in exynos3250_jpeg_reset()
44 void exynos3250_jpeg_poweron(void __iomem *regs) in exynos3250_jpeg_poweron()
49 void exynos3250_jpeg_set_dma_num(void __iomem *regs) in exynos3250_jpeg_set_dma_num()
60 void exynos3250_jpeg_clk_set(void __iomem *base) in exynos3250_jpeg_clk_set()
69 void exynos3250_jpeg_input_raw_fmt(void __iomem *regs, unsigned int fmt) in exynos3250_jpeg_input_raw_fmt()
120 void exynos3250_jpeg_set_y16(void __iomem *regs, bool y16) in exynos3250_jpeg_set_y16()
132 void exynos3250_jpeg_proc_mode(void __iomem *regs, unsigned int mode) in exynos3250_jpeg_proc_mode()
146 void exynos3250_jpeg_subsampling_mode(void __iomem *regs, unsigned int mode) in exynos3250_jpeg_subsampling_mode()
168 unsigned int exynos3250_jpeg_get_subsampling_mode(void __iomem *regs) in exynos3250_jpeg_get_subsampling_mode()
174 void exynos3250_jpeg_dri(void __iomem *regs, unsigned int dri) in exynos3250_jpeg_dri()
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| D | jpeg-hw-s5p.c | 17 void s5p_jpeg_reset(void __iomem *regs) in s5p_jpeg_reset()
30 void s5p_jpeg_poweron(void __iomem *regs) in s5p_jpeg_poweron()
35 void s5p_jpeg_input_raw_mode(void __iomem *regs, unsigned long mode) in s5p_jpeg_input_raw_mode()
51 void s5p_jpeg_proc_mode(void __iomem *regs, unsigned long mode) in s5p_jpeg_proc_mode()
66 void s5p_jpeg_subsampling_mode(void __iomem *regs, unsigned int mode) in s5p_jpeg_subsampling_mode()
81 unsigned int s5p_jpeg_get_subsampling_mode(void __iomem *regs) in s5p_jpeg_get_subsampling_mode()
86 void s5p_jpeg_dri(void __iomem *regs, unsigned int dri) in s5p_jpeg_dri()
101 void s5p_jpeg_qtbl(void __iomem *regs, unsigned int t, unsigned int n) in s5p_jpeg_qtbl()
111 void s5p_jpeg_htbl_ac(void __iomem *regs, unsigned int t) in s5p_jpeg_htbl_ac()
122 void s5p_jpeg_htbl_dc(void __iomem *regs, unsigned int t) in s5p_jpeg_htbl_dc()
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| D | jpeg-hw-exynos4.c | 16 void exynos4_jpeg_sw_reset(void __iomem *base) in exynos4_jpeg_sw_reset()
32 void exynos4_jpeg_set_enc_dec_mode(void __iomem *base, unsigned int mode) in exynos4_jpeg_set_enc_dec_mode()
52 void __exynos4_jpeg_set_img_fmt(void __iomem *base, unsigned int img_fmt, in __exynos4_jpeg_set_img_fmt()
136 void __exynos4_jpeg_set_enc_out_fmt(void __iomem *base, unsigned int out_fmt, in __exynos4_jpeg_set_enc_out_fmt()
169 void exynos4_jpeg_set_interrupt(void __iomem *base, unsigned int version) in exynos4_jpeg_set_interrupt()
183 unsigned int exynos4_jpeg_get_int_status(void __iomem *base) in exynos4_jpeg_get_int_status()
188 unsigned int exynos4_jpeg_get_fifo_status(void __iomem *base) in exynos4_jpeg_get_fifo_status()
193 void exynos4_jpeg_set_huf_table_enable(void __iomem *base, int value) in exynos4_jpeg_set_huf_table_enable()
207 void exynos4_jpeg_set_sys_int_enable(void __iomem *base, int value) in exynos4_jpeg_set_sys_int_enable()
219 void exynos4_jpeg_set_stream_buf_address(void __iomem *base, in exynos4_jpeg_set_stream_buf_address()
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| /drivers/clk/tegra/ |
| D | clk.h | 59 void __iomem *reg;
76 const char *parent_name, void __iomem *reg,
80 void __iomem *reg, spinlock_t *lock);
314 void __iomem *clk_base;
315 void __iomem *pmc;
340 void __iomem *clk_base, void __iomem *pmc,
345 void __iomem *clk_base, void __iomem *pmc,
350 void __iomem *clk_base, void __iomem *pmc,
356 void __iomem *clk_base, void __iomem *pmc,
362 void __iomem *clk_base, void __iomem *pmc,
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| /drivers/net/ethernet/samsung/sxgbe/ |
| D | sxgbe_dma.h | 22 int (*init)(void __iomem *ioaddr, int fix_burst, int burst_map);
23 void (*cha_init)(void __iomem *ioaddr, int cha_num, int fix_burst,
26 void (*enable_dma_transmission)(void __iomem *ioaddr, int dma_cnum);
27 void (*enable_dma_irq)(void __iomem *ioaddr, int dma_cnum);
28 void (*disable_dma_irq)(void __iomem *ioaddr, int dma_cnum);
29 void (*start_tx)(void __iomem *ioaddr, int tchannels);
30 void (*start_tx_queue)(void __iomem *ioaddr, int dma_cnum);
31 void (*stop_tx)(void __iomem *ioaddr, int tchannels);
32 void (*stop_tx_queue)(void __iomem *ioaddr, int dma_cnum);
33 void (*start_rx)(void __iomem *ioaddr, int rchannels);
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| D | sxgbe_mtl.h | 61 void (*mtl_init)(void __iomem *ioaddr, unsigned int etsalg,
64 void (*mtl_set_txfifosize)(void __iomem *ioaddr, int queue_num,
67 void (*mtl_set_rxfifosize)(void __iomem *ioaddr, int queue_num,
70 void (*mtl_enable_txqueue)(void __iomem *ioaddr, int queue_num);
72 void (*mtl_disable_txqueue)(void __iomem *ioaddr, int queue_num);
74 void (*set_tx_mtl_mode)(void __iomem *ioaddr, int queue_num,
77 void (*set_rx_mtl_mode)(void __iomem *ioaddr, int queue_num,
80 void (*mtl_dynamic_dma_rxqueue)(void __iomem *ioaddr);
82 void (*mtl_fc_active)(void __iomem *ioaddr, int queue_num,
85 void (*mtl_fc_deactive)(void __iomem *ioaddr, int queue_num,
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| D | sxgbe_core.c | 21 static void sxgbe_core_init(void __iomem *ioaddr) in sxgbe_core_init()
44 static void sxgbe_core_dump_regs(void __iomem *ioaddr) in sxgbe_core_dump_regs()
48 static int sxgbe_get_lpi_status(void __iomem *ioaddr, const u32 irq_status) in sxgbe_get_lpi_status()
69 static int sxgbe_core_host_irq_status(void __iomem *ioaddr, in sxgbe_core_host_irq_status()
83 static void sxgbe_core_pmt(void __iomem *ioaddr, unsigned long mode) in sxgbe_core_pmt()
88 static void sxgbe_core_set_umac_addr(void __iomem *ioaddr, unsigned char *addr, in sxgbe_core_set_umac_addr()
100 static void sxgbe_core_get_umac_addr(void __iomem *ioaddr, unsigned char *addr, in sxgbe_core_get_umac_addr()
117 static void sxgbe_enable_tx(void __iomem *ioaddr, bool enable) in sxgbe_enable_tx()
129 static void sxgbe_enable_rx(void __iomem *ioaddr, bool enable) in sxgbe_enable_rx()
141 static int sxgbe_get_controller_version(void __iomem *ioaddr) in sxgbe_get_controller_version()
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| D | sxgbe_common.h | 323 void (*core_init)(void __iomem *ioaddr);
325 void (*dump_regs)(void __iomem *ioaddr);
327 int (*host_irq_status)(void __iomem *ioaddr,
330 void (*pmt)(void __iomem *ioaddr, unsigned long mode);
332 void (*set_umac_addr)(void __iomem *ioaddr, unsigned char *addr,
334 void (*get_umac_addr)(void __iomem *ioaddr, unsigned char *addr,
336 void (*enable_rx)(void __iomem *ioaddr, bool enable);
337 void (*enable_tx)(void __iomem *ioaddr, bool enable);
340 int (*get_controller_version)(void __iomem *ioaddr);
343 unsigned int (*get_hw_feature)(void __iomem *ioaddr,
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| /drivers/dma/ |
| D | fsl-edma-common.h | 88 void __iomem *cr;
89 void __iomem *es;
90 void __iomem *erqh;
91 void __iomem *erql; /* aka erq on v32 */
92 void __iomem *eeih;
93 void __iomem *eeil; /* aka eei on v32 */
94 void __iomem *seei;
95 void __iomem *ceei;
96 void __iomem *serq;
97 void __iomem *cerq;
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| /drivers/video/fbdev/nvidia/ |
| D | nv_type.h | 108 u8 __iomem *FbStart;
144 u32 __iomem *dmaBase;
155 volatile u32 __iomem *REGS;
156 volatile u32 __iomem *PCRTC0;
157 volatile u32 __iomem *PCRTC;
158 volatile u32 __iomem *PRAMDAC0;
159 volatile u32 __iomem *PFB;
160 volatile u32 __iomem *PFIFO;
161 volatile u32 __iomem *PGRAPH;
162 volatile u32 __iomem *PEXTDEV;
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| /drivers/video/fbdev/riva/ |
| D | riva_hw.h | 78 #define NV_WR08(p,i,d) (__raw_writeb((d), (void __iomem *)(p) + (i)))
79 #define NV_RD08(p,i) (__raw_readb((void __iomem *)(p) + (i)))
80 #define NV_WR16(p,i,d) (__raw_writew((d), (void __iomem *)(p) + (i)))
81 #define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i)))
82 #define NV_WR32(p,i,d) (__raw_writel((d), (void __iomem *)(p) + (i)))
83 #define NV_RD32(p,i) (__raw_readl((void __iomem *)(p) + (i)))
85 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i)))
86 #define VGA_RD08(p,i) (readb((void __iomem *)(p) + (i)))
444 volatile U032 __iomem *PCRTC0;
445 volatile U032 __iomem *PCRTC;
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| /drivers/clk/imx/ |
| D | clk.h | 13 void imx_mmdc_mask_handshake(void __iomem *ccm_base, unsigned int chn);
98 void __iomem *base, const struct imx_pll14xx_clk *pll_clk);
101 const char *parent, void __iomem *base);
104 void __iomem *base);
107 void __iomem *base);
113 void __iomem *base,
130 const char *parent_name, void __iomem *base, u32 div_mask);
150 void __iomem *base);
154 void __iomem *reg, u8 bit_idx, u8 cgr_val,
168 void __iomem *reg, u8 shift, u32 exclusive_mask);
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| /drivers/misc/ibmasm/ |
| D | lowlevel.h | 41 static inline int sp_interrupt_pending(void __iomem *base_address) in sp_interrupt_pending()
46 static inline int uart_interrupt_pending(void __iomem *base_address) in uart_interrupt_pending()
51 static inline void ibmasm_enable_interrupts(void __iomem *base_address, int mask) in ibmasm_enable_interrupts()
53 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_enable_interrupts()
57 static inline void ibmasm_disable_interrupts(void __iomem *base_address, int mask) in ibmasm_disable_interrupts()
59 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_disable_interrupts()
63 static inline void enable_sp_interrupts(void __iomem *base_address) in enable_sp_interrupts()
68 static inline void disable_sp_interrupts(void __iomem *base_address) in disable_sp_interrupts()
73 static inline void enable_uart_interrupts(void __iomem *base_address) in enable_uart_interrupts()
78 static inline void disable_uart_interrupts(void __iomem *base_address) in disable_uart_interrupts()
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| /drivers/net/ethernet/ti/ |
| D | netcp_xgbepcsr.c | 127 static void netcp_xgbe_serdes_cmu_init(void __iomem *serdes_regs) in netcp_xgbe_serdes_cmu_init()
148 void __iomem *serdes_regs, int lane) in netcp_xgbe_serdes_lane_config()
170 static void netcp_xgbe_serdes_com_enable(void __iomem *serdes_regs) in netcp_xgbe_serdes_com_enable()
182 void __iomem *serdes_regs, int lane) in netcp_xgbe_serdes_lane_enable()
188 static void netcp_xgbe_serdes_phyb_rst_clr(void __iomem *serdes_regs) in netcp_xgbe_serdes_phyb_rst_clr()
193 static void netcp_xgbe_serdes_pll_disable(void __iomem *serdes_regs) in netcp_xgbe_serdes_pll_disable()
198 static void netcp_xgbe_serdes_pll_enable(void __iomem *serdes_regs) in netcp_xgbe_serdes_pll_enable()
204 static int netcp_xgbe_wait_pll_locked(void __iomem *sw_regs) in netcp_xgbe_wait_pll_locked()
230 static void netcp_xgbe_serdes_enable_xgmii_port(void __iomem *sw_regs) in netcp_xgbe_serdes_enable_xgmii_port()
235 static u32 netcp_xgbe_serdes_read_tbus_val(void __iomem *serdes_regs) in netcp_xgbe_serdes_read_tbus_val()
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| /drivers/video/fbdev/kyro/ |
| D | STG4000Interface.h | 20 extern int InitialiseRamdac(volatile STG4000REG __iomem *pSTGReg, u32 displayDepth,
25 extern void DisableRamdacOutput(volatile STG4000REG __iomem *pSTGReg);
26 extern void EnableRamdacOutput(volatile STG4000REG __iomem *pSTGReg);
31 extern void DisableVGA(volatile STG4000REG __iomem *pSTGReg);
32 extern void StopVTG(volatile STG4000REG __iomem *pSTGReg);
33 extern void StartVTG(volatile STG4000REG __iomem *pSTGReg);
34 extern void SetupVTG(volatile STG4000REG __iomem *pSTGReg,
38 extern int SetCoreClockPLL(volatile STG4000REG __iomem *pSTGReg, struct pci_dev *pDev);
43 extern void ResetOverlayRegisters(volatile STG4000REG __iomem *pSTGReg);
45 extern int CreateOverlaySurface(volatile STG4000REG __iomem *pSTGReg,
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| /drivers/video/fbdev/mb862xx/ |
| D | mb862xxfb.h | 58 void __iomem *fb_base; /* remapped framebuffer */
59 void __iomem *mmio_base; /* remapped registers */
65 void __iomem *host; /* relocatable reg. bases */
66 void __iomem *i2c;
67 void __iomem *disp;
68 void __iomem *disp1;
69 void __iomem *cap;
70 void __iomem *cap1;
71 void __iomem *draw;
72 void __iomem *geo;
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| /drivers/net/ethernet/brocade/bna/ |
| D | bfa_ioc.h | 32 void __iomem *pci_bar_kva;
70 void __iomem *hfn_mbox_cmd;
71 void __iomem *hfn_mbox;
72 void __iomem *lpu_mbox_cmd;
73 void __iomem *lpu_mbox;
74 void __iomem *lpu_read_stat;
75 void __iomem *pss_ctl_reg;
76 void __iomem *pss_err_status_reg;
77 void __iomem *app_pll_fast_ctl_reg;
78 void __iomem *app_pll_slow_ctl_reg;
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| /drivers/scsi/arcmsr/ |
| D | arcmsr.h | 307 #define MEM_BASE0(x) (u32 __iomem *)((unsigned long)acb->mem_base0 + x)
308 #define MEM_BASE1(x) (u32 __iomem *)((unsigned long)acb->mem_base1 + x)
514 uint32_t __iomem *drv2iop_doorbell;
515 uint32_t __iomem *drv2iop_doorbell_mask;
516 uint32_t __iomem *iop2drv_doorbell;
517 uint32_t __iomem *iop2drv_doorbell_mask;
518 uint32_t __iomem *message_rwbuffer;
519 uint32_t __iomem *message_wbuffer;
520 uint32_t __iomem *message_rbuffer;
620 u32 __iomem *chip_id; /* 0x00004 */
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| /drivers/sh/intc/ |
| D | access.c | 78 void __iomem *ptr = (void __iomem *)addr; in test_8()
85 void __iomem *ptr = (void __iomem *)addr; in test_16()
92 void __iomem *ptr = (void __iomem *)addr; in test_32()
99 void __iomem *ptr = (void __iomem *)addr; in write_8()
108 void __iomem *ptr = (void __iomem *)addr; in write_16()
117 void __iomem *ptr = (void __iomem *)addr; in write_32()
126 void __iomem *ptr = (void __iomem *)addr; in modify_8()
140 void __iomem *ptr = (void __iomem *)addr; in modify_16()
154 void __iomem *ptr = (void __iomem *)addr; in modify_32()
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| /drivers/net/ethernet/altera/ |
| D | altera_tse.h | 412 struct altera_tse_mac __iomem *mac_dev;
418 void __iomem *rx_dma_csr;
419 void __iomem *rx_dma_desc;
420 void __iomem *rx_dma_resp;
423 void __iomem *tx_dma_csr;
424 void __iomem *tx_dma_desc;
490 u32 csrrd32(void __iomem *mac, size_t offs) in csrrd32()
492 void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); in csrrd32()
497 u16 csrrd16(void __iomem *mac, size_t offs) in csrrd16()
499 void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); in csrrd16()
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| /drivers/parport/ |
| D | parport_sunbpp.c | 53 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_disable_irq()
63 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_enable_irq()
73 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_write_data()
81 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_read_data()
88 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in status_sunbpp_to_pc()
111 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in control_sunbpp_to_pc()
139 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_frob_control()
198 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_data_forward()
208 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_data_reverse()
272 struct bpp_regs __iomem *regs; in bpp_probe()
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