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Searched refs:_mask (Results 1 – 25 of 51) sorted by relevance

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/drivers/staging/iio/meter/
Dmeter.h352 #define IIO_EVENT_ATTR_AENERGY_HALF_FULL(_evlist, _show, _store, _mask) \ argument
353 IIO_EVENT_ATTR_SH(aenergy_half_full, _evlist, _show, _store, _mask)
356 #define IIO_EVENT_ATTR_LINE_VOLT_SAG(_evlist, _show, _store, _mask) \ argument
357 IIO_EVENT_ATTR_SH(line_volt_sag, _evlist, _show, _store, _mask)
363 #define IIO_EVENT_ATTR_CYCEND(_evlist, _show, _store, _mask) \ argument
364 IIO_EVENT_ATTR_SH(cycend, _evlist, _show, _store, _mask)
367 #define IIO_EVENT_ATTR_ZERO_CROSS(_evlist, _show, _store, _mask) \ argument
368 IIO_EVENT_ATTR_SH(zero_cross, _evlist, _show, _store, _mask)
371 #define IIO_EVENT_ATTR_AENERGY_OVERFLOW(_evlist, _show, _store, _mask) \ argument
372 IIO_EVENT_ATTR_SH(aenergy_overflow, _evlist, _show, _store, _mask)
[all …]
/drivers/net/ethernet/sfc/falcon/
Denum.h117 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
118 (!!((LOOPBACK_MASK(_from) ^ LOOPBACK_MASK(_to)) & (_mask)))
120 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
121 ((LOOPBACK_MASK(_from) & (_mask)) && !(LOOPBACK_MASK(_to) & (_mask)))
/drivers/net/ethernet/sfc/
Denum.h118 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
119 (!!((LOOPBACK_MASK(_from) ^ LOOPBACK_MASK(_to)) & (_mask)))
121 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
122 ((LOOPBACK_MASK(_from) & (_mask)) && !(LOOPBACK_MASK(_to) & (_mask)))
/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.h157 #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
162 .variant = _mask, \
167 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
168 _MPP_VAR_FUNCTION(_val, _name, _subname, _mask)
170 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
171 _MPP_VAR_FUNCTION(_val, _name, NULL, _mask)
Dpinctrl-armada-37xx.c112 #define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \ argument
117 .reg_mask = _mask, \
118 .val = {0, _mask}, \
122 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \ argument
127 .reg_mask = _mask, \
128 .val = {0, _mask}, \
132 #define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \ argument
137 .reg_mask = _mask, \
142 #define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \ argument
147 .reg_mask = _mask, \
[all …]
/drivers/bcma/
Dsprom.c185 #define SPEX(_field, _offset, _mask, _shift) \ argument
186 bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift))
188 #define SPEX32(_field, _offset, _mask, _shift) \ argument
190 sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
192 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
194 SPEX(_field[0], _offset + 0, _mask, _shift); \
195 SPEX(_field[1], _offset + 2, _mask, _shift); \
196 SPEX(_field[2], _offset + 4, _mask, _shift); \
197 SPEX(_field[3], _offset + 6, _mask, _shift); \
198 SPEX(_field[4], _offset + 8, _mask, _shift); \
[all …]
/drivers/clk/at91/
Dpmc.h91 #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) argument
92 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) argument
/drivers/ssb/
Dpci.c171 #define SPEX16(_outvar, _offset, _mask, _shift) \ argument
172 out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
173 #define SPEX32(_outvar, _offset, _mask, _shift) \ argument
175 in[SPOFF(_offset)]) & (_mask)) >> (_shift))
176 #define SPEX(_outvar, _offset, _mask, _shift) \ argument
177 SPEX16(_outvar, _offset, _mask, _shift)
179 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
181 SPEX(_field[0], _offset + 0, _mask, _shift); \
182 SPEX(_field[1], _offset + 2, _mask, _shift); \
183 SPEX(_field[2], _offset + 4, _mask, _shift); \
[all …]
/drivers/clk/st/
Dclkgen.h38 #define CLKGEN_FIELD(_offset, _mask, _shift) { \ argument
40 .mask = _mask, \
/drivers/gpu/drm/amd/display/dc/gpio/
Dddc_regs.h36 ….type ## _mask = DC_GPIO_DDC ## id ## _ ## type ## __DC_GPIO_DDC ## id ## cd ## _ ## type ## _MAS…
61 .type ## _mask = DC_GPIO_DDCVGA_ ## type ## __DC_GPIO_DDCVGA ## cd ## _ ## type ## _MASK,\
78 .type ## _mask = DC_GPIO_I2CPAD_ ## type ## __DC_GPIO_ ## cd ## _ ## type ## _MASK,\
Dgeneric_regs.h33 .type ## _mask = DC_GPIO_GENERIC_ ## type ## __DC_GPIO_GENERIC ## id ## _ ## type ## _MASK,\
Dhpd_regs.h41 .type ## _mask = DC_GPIO_HPD_ ## type ## __DC_GPIO_HPD ## id ## _ ## type ## _MASK,\
/drivers/iio/health/
Dafe440x.h83 #define AFE440X_INTENSITY_CHAN(_index, _mask) \ argument
96 _mask, \
/drivers/iio/adc/
Dmax1363.c190 #define MAX1363_MODE_SINGLE(_num, _mask) { \ argument
194 .modemask[0] = _mask, \
197 #define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) { \ argument
201 .modemask[0] = _mask, \
205 #define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) { \ argument
209 .modemask[0] = _mask \
212 #define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) { \ argument
216 .modemask[0] = _mask \
220 #define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) { \ argument
224 .modemask[0] = _mask \
[all …]
Dqcom-spmi-vadc.c511 #define VADC_CHAN(_dname, _type, _mask, _pre, _scale) \ argument
516 .info_mask = _mask, \
520 #define VADC_NO_CHAN(_dname, _type, _mask, _pre) \ argument
525 .info_mask = _mask \
/drivers/clk/uniphier/
Dclk-uniphier.h69 #define UNIPHIER_CLK_CPUGEAR(_name, _idx, _regbase, _mask, \ argument
79 .mask = (_mask) \
/drivers/gpu/drm/rockchip/
Drockchip_vop_reg.c20 #define _VOP_REG(off, _mask, _shift, _write_mask, _relaxed) \ argument
23 .mask = _mask, \
29 #define VOP_REG(off, _mask, _shift) \ argument
30 _VOP_REG(off, _mask, _shift, false, true)
32 #define VOP_REG_SYNC(off, _mask, _shift) \ argument
33 _VOP_REG(off, _mask, _shift, false, false)
35 #define VOP_REG_MASK_SYNC(off, _mask, _shift) \ argument
36 _VOP_REG(off, _mask, _shift, true, false)
/drivers/net/dsa/
Dbcm_sf2.h163 priv->irq##which##_mask &= ~(mask); \
170 priv->irq##which##_mask |= (mask); \
/drivers/pinctrl/
Dpinctrl-palmas.c392 #define PULL_UP_DN(_name, _rbase, _add, _mask, _nv, _uv, _dv) \ argument
396 .pullup_dn_mask = _mask, \
428 #define OD_INFO(_name, _rbase, _add, _mask, _ev, _dv) \ argument
432 .od_mask = _mask, \
506 #define PALMAS_PINGROUP(pg_name, pin_id, base, reg, _mask, _bshift, o0, o1, o2, o3) \ argument
513 .mux_reg_mask = _mask, \
/drivers/irqchip/
Dirq-pic32-evic.c119 #define IRQ_REG_MASK(_hwirq, _reg, _mask) \ argument
122 _mask = 1 << (_hwirq % 32); \
/drivers/mfd/
Dmax8997-irq.c54 #define DECLARE_IRQ(idx, _group, _mask) \ argument
55 [(idx)] = { .group = (_group), .mask = (_mask) }
Dtps80031.c82 #define TPS80031_IRQ(_reg, _mask) \ argument
86 .mask = BIT(_mask), \
/drivers/pinctrl/spear/
Dpinctrl-plgpio.c645 #define plgpio_prepare_reg(__reg, _off, _mask, _tmp) \ argument
648 _tmp &= ~_mask; \
650 _tmp | (plgpio->csave_regs[i].__reg & _mask); \
/drivers/phy/mscc/
Dphy-ocelot-serdes.c345 #define SERDES_MUX(_idx, _port, _mode, _submode, _mask, _mux) { \ argument
350 .mask = _mask, \
/drivers/perf/
Darm-ccn.c286 #define CCN_EVENT_MN(_name, _def, _mask) { .attr = CCN_EVENT_ATTR(mn_##_name), \ argument
289 .def = _def, .mask = _mask, }
291 #define CCN_EVENT_HNI(_name, _def, _mask) { \ argument
294 .num_vcs = CCN_NUM_VCS, .def = _def, .mask = _mask, }
296 #define CCN_EVENT_SBSX(_name, _def, _mask) { \ argument
299 .num_vcs = CCN_NUM_VCS, .def = _def, .mask = _mask, }

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