| /drivers/clk/tegra/ |
| D | cvb.c | 26 const struct rail_alignment *align) in round_cvb_voltage() argument
30 int step = (align->step_uv ? : 1000) * v_scale; in round_cvb_voltage()
31 int offset = align->offset_uv * v_scale; in round_cvb_voltage()
34 uv = DIV_ROUND_UP(uv, step) * align->step_uv + align->offset_uv; in round_cvb_voltage()
43 static int round_voltage(int mv, const struct rail_alignment *align, int up) in round_voltage() argument
45 if (align->step_uv) { in round_voltage()
48 uv = max(mv * 1000, align->offset_uv) - align->offset_uv; in round_voltage()
49 uv = (uv + (up ? align->step_uv - 1 : 0)) / align->step_uv; in round_voltage()
50 return (uv * align->step_uv + align->offset_uv) / 1000; in round_voltage()
56 struct rail_alignment *align, in build_opp_table() argument
[all …]
|
| D | clk-tegra124-dfll-fcpu.c | 524 struct rail_alignment *align) in get_alignment_from_dt() argument
528 &align->step_uv)) in get_alignment_from_dt()
529 align->step_uv = 0; in get_alignment_from_dt()
533 &align->offset_uv)) in get_alignment_from_dt()
534 align->offset_uv = 0; in get_alignment_from_dt()
538 struct rail_alignment *align) in get_alignment_from_regulator() argument
545 align->offset_uv = regulator_list_voltage(reg, 0); in get_alignment_from_regulator()
546 align->step_uv = regulator_get_linear_step(reg); in get_alignment_from_regulator()
558 struct rail_alignment align; in tegra124_dfll_fcpu_probe() local
585 get_alignment_from_dt(&pdev->dev, &align); in tegra124_dfll_fcpu_probe()
[all …]
|
| /drivers/nvdimm/ |
| D | pfn_devs.c | 103 return sprintf(buf, "%ld\n", nd_pfn->align); in align_show()
140 rc = nd_size_select_store(dev, buf, &nd_pfn->align, in align_store()
149 static DEVICE_ATTR_RW(align);
311 nd_pfn->align = nd_pfn_default_alignment(); in nd_pfn_devinit()
421 static bool nd_supported_alignment(unsigned long align) in nd_supported_alignment() argument
426 if (align == 0) in nd_supported_alignment()
431 if (align == supported[i]) in nd_supported_alignment()
450 unsigned long align, start_pad; in nd_pfn_validate() local
482 pfn_sb->align = 0; in nd_pfn_validate()
497 align = le32_to_cpu(pfn_sb->align); in nd_pfn_validate()
[all …]
|
| /drivers/dax/ |
| D | device.c | 35 mask = dax_region->align - 1; in check_vma()
90 if (dax_region->align > PAGE_SIZE) { in __dev_dax_pte_fault()
92 dax_region->align, fault_size); in __dev_dax_pte_fault()
96 if (fault_size != dax_region->align) in __dev_dax_pte_fault()
124 if (dax_region->align > PMD_SIZE) { in __dev_dax_pmd_fault()
126 dax_region->align, fault_size); in __dev_dax_pmd_fault()
136 if (fault_size < dax_region->align) in __dev_dax_pmd_fault()
138 else if (fault_size > dax_region->align) in __dev_dax_pmd_fault()
174 if (dax_region->align > PUD_SIZE) { in __dev_dax_pud_fault()
176 dax_region->align, fault_size); in __dev_dax_pud_fault()
[all …]
|
| /drivers/gpu/drm/radeon/ |
| D | radeon_sa.c | 52 unsigned size, u32 align, u32 domain, u32 flags) in radeon_sa_bo_manager_init() argument
60 sa_manager->align = align; in radeon_sa_bo_manager_init()
67 r = radeon_bo_create(rdev, size, align, true, in radeon_sa_bo_manager_init()
192 unsigned size, unsigned align) in radeon_sa_bo_try_alloc() argument
198 wasted = (align - (soffset % align)) % align; in radeon_sa_bo_try_alloc()
225 unsigned size, unsigned align) in radeon_sa_event() argument
238 wasted = (align - (soffset % align)) % align; in radeon_sa_event()
315 unsigned size, unsigned align) in radeon_sa_bo_new() argument
321 BUG_ON(align > sa_manager->align); in radeon_sa_bo_new()
344 size, align)) { in radeon_sa_bo_new()
[all …]
|
| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_sa.c | 52 unsigned size, u32 align, u32 domain) in amdgpu_sa_bo_manager_init() argument
60 sa_manager->align = align; in amdgpu_sa_bo_manager_init()
66 r = amdgpu_bo_create_kernel(adev, size, align, domain, &sa_manager->bo, in amdgpu_sa_bo_manager_init()
153 unsigned size, unsigned align) in amdgpu_sa_bo_try_alloc() argument
159 wasted = (align - (soffset % align)) % align; in amdgpu_sa_bo_try_alloc()
186 unsigned size, unsigned align) in amdgpu_sa_event() argument
197 wasted = (align - (soffset % align)) % align; in amdgpu_sa_event()
277 unsigned size, unsigned align) in amdgpu_sa_bo_new() argument
285 if (WARN_ON_ONCE(align > sa_manager->align)) in amdgpu_sa_bo_new()
308 size, align)) { in amdgpu_sa_bo_new()
[all …]
|
| /drivers/staging/fwserial/ |
| D | dma_fifo.c | 58 int dma_fifo_alloc(struct dma_fifo *fifo, int size, unsigned int align, in dma_fifo_alloc() argument
63 if (!is_power_of_2(align) || size < 0) in dma_fifo_alloc()
66 size = round_up(size, align); in dma_fifo_alloc()
67 capacity = size + align * open_limit + align * DMA_FIFO_GUARD; in dma_fifo_alloc()
77 fifo->align = align; in dma_fifo_alloc()
78 fifo->tx_limit = max_t(int, round_down(tx_limit, align), align); in dma_fifo_alloc()
81 fifo->guard = size + align * open_limit; in dma_fifo_alloc()
212 fifo->out += round_up(n, fifo->align); in dma_fifo_out_pend()
229 if (FAIL(fifo, fifo->out & (fifo->align - 1), in dma_fifo_out_pend()
231 fifo->out, fifo->align)) in dma_fifo_out_pend()
|
| D | dma_fifo.h | 49 unsigned int align; /* must be power of 2 */ member
76 int dma_fifo_alloc(struct dma_fifo *fifo, int size, unsigned int align,
112 tx_limit = round_down(tx_limit, fifo->align); in dma_fifo_change_tx_limit()
113 fifo->tx_limit = max_t(int, tx_limit, fifo->align); in dma_fifo_change_tx_limit()
|
| /drivers/firmware/efi/libstub/ |
| D | random.c | 43 unsigned long align = 1UL << align_shift; in get_entry_num_slots() local
51 first_slot = round_up(md->phys_addr, align); in get_entry_num_slots()
52 last_slot = round_down(region_end - size + 1, align); in get_entry_num_slots()
70 unsigned long align, in efi_random_alloc() argument
92 if (align < EFI_ALLOC_ALIGN) in efi_random_alloc()
93 align = EFI_ALLOC_ALIGN; in efi_random_alloc()
100 slots = get_entry_num_slots(md, size, ilog2(align)); in efi_random_alloc()
129 target = round_up(md->phys_addr, align) + target_slot * align; in efi_random_alloc()
|
| /drivers/net/wireless/ralink/rt2x00/ |
| D | rt2x00crypto.c | 149 unsigned int align = ALIGN_SIZE(skb, header_length); in rt2x00crypto_rx_insert_iv() local
190 skb_push(skb, iv_len - align); in rt2x00crypto_rx_insert_iv()
195 skb->data + transfer + (iv_len - align), in rt2x00crypto_rx_insert_iv()
199 skb_push(skb, iv_len + align); in rt2x00crypto_rx_insert_iv()
200 if (align < icv_len) in rt2x00crypto_rx_insert_iv()
201 skb_put(skb, icv_len - align); in rt2x00crypto_rx_insert_iv()
202 else if (align > icv_len) in rt2x00crypto_rx_insert_iv()
207 skb->data + transfer + iv_len + align, in rt2x00crypto_rx_insert_iv()
222 skb->data + transfer + align, in rt2x00crypto_rx_insert_iv()
|
| /drivers/pcmcia/ |
| D | rsrc_iodyn.c | 28 resource_size_t size, resource_size_t align) in pcmcia_align() argument
57 unsigned long align) in __iodyn_find_io_region() argument
65 data.mask = align - 1; in __iodyn_find_io_region()
86 unsigned int align, struct resource **parent) in iodyn_find_io() argument
101 if ((s->io[i].res->start & (align-1)) == *base) in iodyn_find_io()
114 if (align == 0) in iodyn_find_io()
115 align = 0x10000; in iodyn_find_io()
118 num, align); in iodyn_find_io()
|
| D | pcmcia_resource.c | 45 struct resource *pcmcia_find_mem_region(u_long base, u_long num, u_long align, in pcmcia_find_mem_region() argument
49 return s->resource_ops->find_mem(base, num, align, low, s); in pcmcia_find_mem_region()
99 unsigned int align; in alloc_io_space() local
109 align = base ? (lines ? 1<<lines : 0) : 1; in alloc_io_space()
110 if (align && (align < num)) { in alloc_io_space()
113 align = 0; in alloc_io_space()
115 while (align && (align < num)) in alloc_io_space()
116 align <<= 1; in alloc_io_space()
118 if (base & ~(align-1)) { in alloc_io_space()
120 align = 0; in alloc_io_space()
[all …]
|
| /drivers/gpu/drm/exynos/ |
| D | exynos_drm_rotator.c | 360 { IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) },
365 { IPP_SIZE_LIMIT(AREA, .h.align = 4, .v.align = 4) },
370 { IPP_SIZE_LIMIT(AREA, .h.align = 4, .v.align = 4) },
375 { IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) },
380 { IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) },
385 { IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) },
390 { IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) },
|
| /drivers/of/ |
| D | of_reserved_mem.c | 30 phys_addr_t align, phys_addr_t start, phys_addr_t end, bool nomap, in early_init_dt_alloc_reserved_memory_arch() argument
36 align = !align ? SMP_CACHE_BYTES : align; in early_init_dt_alloc_reserved_memory_arch()
37 base = memblock_find_in_range(start, end, size, align); in early_init_dt_alloc_reserved_memory_arch()
79 phys_addr_t base = 0, align = 0, size; in __reserved_mem_alloc_size() local
104 align = dt_mem_next_cell(dt_root_addr_cells, &prop); in __reserved_mem_alloc_size()
115 align = max(align, (phys_addr_t)PAGE_SIZE << order); in __reserved_mem_alloc_size()
135 align, start, end, nomap, &base); in __reserved_mem_alloc_size()
146 ret = early_init_dt_alloc_reserved_memory_arch(size, align, in __reserved_mem_alloc_size()
|
| /drivers/pci/ |
| D | setup-bus.c | 161 resource_size_t align; in pdev_sort_resources() local
163 align = pci_resource_alignment(dev_res->dev, in pdev_sort_resources()
166 if (r_align > align) { in pdev_sort_resources()
219 resource_size_t add_size, align; in reassign_resources_sorted() local
242 align = add_res->min_align; in reassign_resources_sorted()
244 res->start = align; in reassign_resources_sorted()
252 add_size, align)) in reassign_resources_sorted()
373 resource_size_t add_align, align; in __assign_resources_sorted() local
417 align = pci_resource_alignment(dev_res2->dev, in __assign_resources_sorted()
419 if (add_align > align) { in __assign_resources_sorted()
[all …]
|
| D | setup-res.c | 240 resource_size_t align) in pcibios_align_resource() argument
246 int resno, resource_size_t size, resource_size_t align) in __pci_assign_resource() argument
261 ret = pci_bus_alloc_resource(bus, res, size, align, min, in __pci_assign_resource()
273 ret = pci_bus_alloc_resource(bus, res, size, align, min, in __pci_assign_resource()
287 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0, in __pci_assign_resource()
312 resource_size_t align, size; in pci_assign_resource() local
319 align = pci_resource_alignment(dev, res); in pci_assign_resource()
320 if (!align) { in pci_assign_resource()
327 ret = _pci_assign_resource(dev, resno, size, align); in pci_assign_resource()
|
| /drivers/net/ethernet/marvell/octeontx2/af/ |
| D | common.h | 47 u8 align; member
75 qmem->align = (aligned_addr - qmem->iova); in qmem_alloc()
76 qmem->base += qmem->align; in qmem_alloc()
77 qmem->iova += qmem->align; in qmem_alloc()
88 qmem->base - qmem->align, in qmem_free()
89 qmem->iova - qmem->align); in qmem_free()
|
| /drivers/gpu/drm/nouveau/ |
| D | nouveau_bo.h | 74 struct nouveau_bo *nouveau_bo_alloc(struct nouveau_cli *, u64 *size, int *align,
76 int nouveau_bo_init(struct nouveau_bo *, u64 size, int align, u32 flags,
78 int nouveau_bo_new(struct nouveau_cli *, u64 size, int align, u32 flags,
118 nouveau_bo_new_pin_map(struct nouveau_cli *cli, u64 size, int align, u32 flags, in nouveau_bo_new_pin_map() argument
121 int ret = nouveau_bo_new(cli, size, align, flags, in nouveau_bo_new_pin_map()
|
| /drivers/gpu/drm/nouveau/nvkm/core/ |
| D | gpuobj.c | 172 nvkm_gpuobj_ctor(struct nvkm_device *device, u32 size, int align, bool zero, in nvkm_gpuobj_ctor() argument
179 if (align >= 0) { in nvkm_gpuobj_ctor()
181 max(align, 1), &gpuobj->node); in nvkm_gpuobj_ctor()
184 -align, &gpuobj->node); in nvkm_gpuobj_ctor()
202 abs(align), zero, &gpuobj->memory); in nvkm_gpuobj_ctor()
229 nvkm_gpuobj_new(struct nvkm_device *device, u32 size, int align, bool zero, in nvkm_gpuobj_new() argument
238 ret = nvkm_gpuobj_ctor(device, size, align, zero, parent, gpuobj); in nvkm_gpuobj_new()
|
| /drivers/gpu/drm/nouveau/nvkm/subdev/instmem/ |
| D | gk20a.c | 383 gk20a_instobj_ctor_dma(struct gk20a_instmem *imem, u32 npages, u32 align, in gk20a_instobj_ctor_dma() argument
406 if (unlikely(node->handle & (align - 1))) in gk20a_instobj_ctor_dma()
409 &node->handle, align); in gk20a_instobj_ctor_dma()
421 gk20a_instobj_ctor_iommu(struct gk20a_instmem *imem, u32 npages, u32 align, in gk20a_instobj_ctor_iommu() argument
466 align >> imem->iommu_pgshift, &r); in gk20a_instobj_ctor_iommu()
514 gk20a_instobj_new(struct nvkm_instmem *base, u32 size, u32 align, bool zero, in gk20a_instobj_new() argument
523 imem->domain ? "IOMMU" : "DMA", size, align); in gk20a_instobj_new()
527 align = max(roundup(align, PAGE_SIZE), PAGE_SIZE); in gk20a_instobj_new()
531 align, &node); in gk20a_instobj_new()
534 align, &node); in gk20a_instobj_new()
[all …]
|
| /drivers/misc/mic/scif/ |
| D | scif_rma.h | 415 size_t align = ALIGN(size, PAGE_SIZE); in scif_zalloc() local
417 if (align && get_order(align) < MAX_ORDER) in scif_zalloc()
419 get_order(align)); in scif_zalloc()
420 return ret ? ret : vzalloc(align); in scif_zalloc()
431 size_t align = ALIGN(size, PAGE_SIZE); in scif_free() local
436 free_pages((unsigned long)addr, get_order(align)); in scif_free()
|
| /drivers/gpu/drm/nouveau/nvkm/engine/cipher/ |
| D | g84.c | 35 int align, struct nvkm_gpuobj **pgpuobj) in g84_cipher_oclass_bind() argument
38 align, false, parent, pgpuobj); in g84_cipher_oclass_bind()
57 int align, struct nvkm_gpuobj **pgpuobj) in g84_cipher_cclass_bind() argument
60 align, true, parent, pgpuobj); in g84_cipher_cclass_bind()
|
| /drivers/dma/ |
| D | dmatest.c | 508 unsigned int buf_size, u8 align) in dmatest_alloc_test_data() argument
521 d->raw[i] = kmalloc(buf_size + align, GFP_KERNEL); in dmatest_alloc_test_data()
526 if (align) in dmatest_alloc_test_data()
527 d->aligned[i] = PTR_ALIGN(d->raw[i], align); in dmatest_alloc_test_data()
578 u8 align = 0; in dmatest_func() local
596 align = params->alignment < 0 ? dev->copy_align : in dmatest_func()
600 align = params->alignment < 0 ? dev->fill_align : in dmatest_func()
608 align = params->alignment < 0 ? dev->xor_align : in dmatest_func()
614 align = params->alignment < 0 ? dev->pq_align : in dmatest_func()
634 if (1 << align > buf_size) { in dmatest_func()
[all …]
|
| /drivers/pinctrl/mediatek/ |
| D | pinctrl-mt8135.c | 234 unsigned char align, bool isup, unsigned int r1r0) in spec_pull_set() argument
252 reg_pupd = spec_pupd[i].pupd_offset + align; in spec_pull_set()
254 reg_pupd = spec_pupd[i].pupd_offset + (align << 1); in spec_pull_set()
258 reg_set_r0 = spec_pupd[i].r0_offset + align; in spec_pull_set()
259 reg_rst_r0 = spec_pupd[i].r0_offset + (align << 1); in spec_pull_set()
260 reg_set_r1 = spec_pupd[i].r1_offset + align; in spec_pull_set()
261 reg_rst_r1 = spec_pupd[i].r1_offset + (align << 1); in spec_pull_set()
|
| D | pinctrl-mt8516.c | 190 unsigned char align, bool isup, unsigned int r1r0) in mt8516_spec_pull_set() argument
193 ARRAY_SIZE(mt8516_spec_pupd), pin, align, isup, r1r0); in mt8516_spec_pull_set()
296 unsigned char align, int value, enum pin_config_param arg) in mt8516_ies_smt_set() argument
300 ARRAY_SIZE(mt8516_ies_set), pin, align, value); in mt8516_ies_smt_set()
303 ARRAY_SIZE(mt8516_smt_set), pin, align, value); in mt8516_ies_smt_set()
|