| /drivers/clk/samsung/ |
| D | clk-exynos5250.c | 105 apll, mpll, cpll, epll, vpll, gpll, bpll, enumerator
733 [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK,
749 #define E5250_CPU_DIV0(apll, pclk_dbg, atb, periph, acp, cpud) \ argument
750 ((((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
804 exynos5250_plls[apll].rate_table = apll_24mhz_tbl; in exynos5250_clk_init()
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| D | clk-exynos4.c | 146 apll, mpll, epll, vpll, enumerator
1147 [apll] = PLL(pll_4508, CLK_FOUT_APLL, "fout_apll", "fin_pll",
1158 [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll",
1192 #define E4210_CPU_DIV0(apll, pclk_dbg, atb, periph, corem1, corem0) \ argument
1193 (((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
1255 exynos4210_plls[apll].rate_table = in exynos4_clk_init()
1269 exynos4x12_plls[apll].rate_table = in exynos4_clk_init()
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| D | clk-exynos5410.c | 61 apll, cpll, epll, mpll, enumerator
240 [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK,
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| D | clk-s5pv210.c | 68 apll, enumerator
716 [apll] = PLL(pll_4508, FOUT_APLL, "fout_apll", "fin_pll",
728 [apll] = PLL(pll_4502, FOUT_APLL, "fout_apll", "fin_pll",
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| D | clk-exynos5420.c | 150 apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, enumerator
1444 [apll] = PLL(pll_2550, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK,
1468 #define E5420_EGL_DIV0(apll, pclk_dbg, atb, cpud) \ argument
1469 ((((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
1564 exynos5x_plls[apll].rate_table = exynos5420_pll2550x_24mhz_tbl; in exynos5x_clk_init()
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| D | clk-exynos3250.c | 788 #define E3250_CPU_DIV0(apll, pclk_dbg, atb, corem) \ argument
789 (((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
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| /drivers/clk/ti/ |
| D | Makefile | 6 fixed-factor.o mux.o apll.o \
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| /drivers/clk/rockchip/ |
| D | clk-rk3036.c | 21 apll, dpll, gpll, enumerator
135 [apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
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| D | clk-rk3188.c | 19 apll, cpll, dpll, gpll, enumerator
214 [apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
225 [apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
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| D | clk-rk3128.c | 18 apll, dpll, cpll, gpll, enumerator
158 [apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
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| D | clk-rk3228.c | 19 apll, dpll, cpll, gpll, enumerator
170 [apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
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| D | clk-rv1108.c | 19 apll, dpll, gpll, enumerator
153 [apll] = PLL(pll_rk3399, PLL_APLL, "apll", mux_pll_p, 0, RV1108_PLL_CON(0),
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| D | clk-rk3328.c | 21 apll, dpll, cpll, gpll, npll, enumerator
214 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
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| D | clk-rk3288.c | 19 apll, dpll, cpll, gpll, npll, enumerator
220 [apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK3288_PLL_CON(0),
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| D | clk-rk3308.c | 18 apll, dpll, vpll0, vpll1, enumerator
180 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
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| D | clk-px30.c | 18 apll, dpll, cpll, npll, apll_b_h, apll_b_l, enumerator
180 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
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| /drivers/media/i2c/ |
| D | saa7115.c | 93 bool apll; member
787 if (state->apll) in saa711x_s_clock_freq()
1387 state->apll = flags & SAA7115_FREQ_FL_APLL; in saa711x_s_crystal_freq()
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