Searched refs:best_freq (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/i2c/ |
| D | ch7006_mode.c | 263 int freq, best_freq = 0; in ch7006_setup_pll() local
270 abs(best_freq - mode->mode.clock)) { in ch7006_setup_pll()
271 best_freq = freq; in ch7006_setup_pll()
290 best_n, best_m, best_freq, best_n < 108); in ch7006_setup_pll()
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| /drivers/gpu/drm/rockchip/ |
| D | dw-mipi-dsi-rockchip.c | 480 unsigned long best_freq = 0; in dw_mipi_dsi_get_lane_mbps() local
545 best_freq = tmp; in dw_mipi_dsi_get_lane_mbps()
549 if (best_freq) { in dw_mipi_dsi_get_lane_mbps()
550 dsi->lane_mbps = DIV_ROUND_UP(best_freq, USEC_PER_SEC); in dw_mipi_dsi_get_lane_mbps()
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| /drivers/mmc/host/ |
| D | sh_mmcif.c | 489 unsigned int freq, best_freq, myclk, div, diff_min, diff; in sh_mmcif_clock_control() local
494 best_freq = 0; in sh_mmcif_clock_control()
510 best_freq = freq; in sh_mmcif_clock_control()
517 (best_freq / (1 << (clkdiv + 1))), clk, in sh_mmcif_clock_control()
518 best_freq, clkdiv); in sh_mmcif_clock_control()
520 clk_set_rate(host->clk, best_freq); in sh_mmcif_clock_control()
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| D | renesas_sdhi_core.c | 126 unsigned int freq, diff, best_freq = 0, diff_min = ~0; in renesas_sdhi_clk_update() local
151 best_freq = freq; in renesas_sdhi_clk_update()
156 clk_set_rate(priv->clk, best_freq); in renesas_sdhi_clk_update()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_display.c | 1125 uint32_t best_freq = -1; in radeon_compute_pll_legacy() local
1239 best_freq = current_freq; in radeon_compute_pll_legacy()
1243 if (best_freq == -1) { in radeon_compute_pll_legacy()
1248 best_freq = current_freq; in radeon_compute_pll_legacy()
1261 best_freq = current_freq; in radeon_compute_pll_legacy()
1279 *dot_clock_p = best_freq / 10000; in radeon_compute_pll_legacy()
1286 best_freq / 1000, best_feedback_div, best_frac_feedback_div, in radeon_compute_pll_legacy()
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| /drivers/iio/imu/ |
| D | adis16480.c | 560 unsigned int i, best_freq; in adis16480_set_filter_freq() local
575 best_freq = 0; in adis16480_set_filter_freq()
582 best_freq = i; in adis16480_set_filter_freq()
588 val |= best_freq << offset; in adis16480_set_filter_freq()
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| /drivers/spi/ |
| D | spi-pl022.c | 1744 u32 rate, max_tclk, min_tclk, best_freq = 0, best_cpsdvsr = 0, in calculate_effective_freq() local
1783 if (tmp > best_freq) { in calculate_effective_freq()
1784 best_freq = tmp; in calculate_effective_freq()
1801 WARN(!best_freq, "pl022: Matching cpsdvsr and scr not found for %d Hz rate \n", in calculate_effective_freq()
1808 freq, best_freq); in calculate_effective_freq()
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| /drivers/gpu/drm/exynos/ |
| D | exynos_drm_dsi.c | 544 unsigned long best_freq = 0; in exynos_dsi_pll_find_pms() local
580 best_freq = tmp; in exynos_dsi_pll_find_pms()
585 if (best_freq) { in exynos_dsi_pll_find_pms()
591 return best_freq; in exynos_dsi_pll_find_pms()
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