| /drivers/gpu/drm/i915/gt/ |
| D | intel_timeline.c | 54 hwsp_alloc(struct intel_timeline *timeline, unsigned int *cacheline) in hwsp_alloc() argument
92 *cacheline = __ffs64(hwsp->free_bitmap); in hwsp_alloc()
93 hwsp->free_bitmap &= ~BIT_ULL(*cacheline); in hwsp_alloc()
103 static void __idle_hwsp_free(struct intel_timeline_hwsp *hwsp, int cacheline) in __idle_hwsp_free() argument
114 GEM_BUG_ON(cacheline >= BITS_PER_TYPE(hwsp->free_bitmap)); in __idle_hwsp_free()
115 hwsp->free_bitmap |= BIT_ULL(cacheline); in __idle_hwsp_free()
159 cacheline_alloc(struct intel_timeline_hwsp *hwsp, unsigned int cacheline) in cacheline_alloc() argument
164 GEM_BUG_ON(cacheline >= BIT(CACHELINE_BITS)); in cacheline_alloc()
178 cl->vaddr = page_pack_bits(vaddr, cacheline); in cacheline_alloc()
223 unsigned int cacheline; in intel_timeline_init() local
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| D | intel_engine.h | 293 #define cacheline(a) round_down(a, CACHELINE_BYTES) in assert_ring_tail_valid() macro
294 GEM_BUG_ON(cacheline(tail) == cacheline(ring->head) && in assert_ring_tail_valid()
296 #undef cacheline in assert_ring_tail_valid()
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| D | selftest_timeline.c | 67 unsigned long cacheline; in __mock_hwsp_timeline() local
74 cacheline = hwsp_cacheline(tl); in __mock_hwsp_timeline()
75 err = radix_tree_insert(&state->cachelines, cacheline, tl); in __mock_hwsp_timeline()
79 cacheline); in __mock_hwsp_timeline()
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| /drivers/soc/qcom/ |
| D | smem.c | 153 __le32 cacheline; member
269 size_t cacheline[SMEM_HOST_COUNT]; member
287 size_t cacheline) in phdr_to_first_cached_entry() argument
292 return p + le32_to_cpu(phdr->size) - ALIGN(sizeof(*e), cacheline); in phdr_to_first_cached_entry()
321 cached_entry_next(struct smem_private_entry *e, size_t cacheline) in cached_entry_next() argument
325 return p - le32_to_cpu(e->size) - ALIGN(sizeof(*e), cacheline); in cached_entry_next()
513 size_t cacheline, in qcom_smem_get_private() argument
539 e = phdr_to_first_cached_entry(phdr, cacheline); in qcom_smem_get_private()
554 e = cached_entry_next(e, cacheline); in qcom_smem_get_private()
597 cacheln = __smem->cacheline[host]; in qcom_smem_get()
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| /drivers/md/bcache/ |
| D | bset.c | 527 unsigned int cacheline, in cacheline_to_bkey() argument
530 return ((void *) t->data) + cacheline * BSET_CACHELINE + offset * 8; in cacheline_to_bkey()
539 unsigned int cacheline, in bkey_to_cacheline_offset() argument
542 return (u64 *) k - (u64 *) cacheline_to_bkey(t, cacheline, 0); in bkey_to_cacheline_offset()
559 static struct bkey *table_to_bkey(struct bset_tree *t, unsigned int cacheline) in table_to_bkey() argument
561 return cacheline_to_bkey(t, cacheline, t->prev[cacheline]); in table_to_bkey()
696 unsigned int j, cacheline = 1; in bch_bset_build_written_tree() local
717 while (bkey_to_cacheline(t, k) < cacheline) in bch_bset_build_written_tree()
721 t->tree[j].m = bkey_to_cacheline_offset(t, cacheline++, k); in bch_bset_build_written_tree()
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| /drivers/lightnvm/ |
| D | pblk-rb.c | 140 entry->cacheline = pblk_cacheline_to_addr(init_entry++); in pblk_rb_init()
146 entry->cacheline = pblk_cacheline_to_addr(init_entry++); in pblk_rb_init()
260 entry->cacheline); in __pblk_rb_update_l2p()
353 pblk_update_map_cache(pblk, w_ctx.lba, entry->cacheline); in pblk_rb_write_entry_user()
377 if (!pblk_update_map_gc(pblk, w_ctx.lba, entry->cacheline, line, paddr)) in pblk_rb_write_entry_gc()
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| D | pblk-write.c | 166 if (!pblk_ppa_comp(ppa_l2p, entry->cacheline)) in pblk_prepare_resubmit()
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| D | pblk.h | 149 struct ppa_addr cacheline; /* Cacheline for this entry */ member
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| /drivers/edac/ |
| D | Kconfig | 96 - inject_section (0..3, 16-byte section of 64-byte cacheline),
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| /drivers/scsi/aic7xxx/ |
| D | aic7xxx.seq | 754 * We fetch a "cacheline aligned" and sized amount of data
758 * cacheline size is unknown.
795 * If the ending address is on a cacheline boundary,
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| D | aic7xxx.reg | 1436 * Partial transfer past cacheline end to be
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| D | aic79xx.seq | 1523 * We fetch a "cacheline aligned" and sized amount of data
1527 * cacheline size is unknown.
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| /drivers/char/ |
| D | Kconfig | 139 of threads across a large system which avoids bouncing a cacheline
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