Searched refs:ce_hdr (Results 1 – 7 of 7) sorted by relevance
1121 struct ath10k_ce_crash_hdr *ce_hdr; in ath10k_coredump_build() local1134 len += sizeof(*dump_tlv) + sizeof(*ce_hdr) + in ath10k_coredump_build()1135 CE_COUNT * sizeof(ce_hdr->entries[0]); in ath10k_coredump_build()1195 dump_tlv->tlv_len = cpu_to_le32(struct_size(ce_hdr, entries, in ath10k_coredump_build()1197 ce_hdr = (struct ath10k_ce_crash_hdr *)(dump_tlv->tlv_data); in ath10k_coredump_build()1198 ce_hdr->ce_count = cpu_to_le32(CE_COUNT); in ath10k_coredump_build()1199 memset(ce_hdr->reserved, 0, sizeof(ce_hdr->reserved)); in ath10k_coredump_build()1200 memcpy(ce_hdr->entries, crash_data->ce_crash_data, in ath10k_coredump_build()1201 CE_COUNT * sizeof(ce_hdr->entries[0])); in ath10k_coredump_build()1202 sofar += sizeof(*dump_tlv) + sizeof(*ce_hdr) + in ath10k_coredump_build()[all …]
2457 const struct gfx_firmware_header_v1_0 *ce_hdr; in gfx_v7_0_cp_gfx_load_microcode() local2466 ce_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; in gfx_v7_0_cp_gfx_load_microcode()2470 amdgpu_ucode_print_gfx_hdr(&ce_hdr->header); in gfx_v7_0_cp_gfx_load_microcode()2473 adev->gfx.ce_fw_version = le32_to_cpu(ce_hdr->header.ucode_version); in gfx_v7_0_cp_gfx_load_microcode()2476 adev->gfx.ce_feature_version = le32_to_cpu(ce_hdr->ucode_feature_version); in gfx_v7_0_cp_gfx_load_microcode()2494 le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_gfx_load_microcode()2495 fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_gfx_load_microcode()
1974 const struct gfx_firmware_header_v1_0 *ce_hdr; in gfx_v6_0_cp_gfx_load_microcode() local1984 ce_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; in gfx_v6_0_cp_gfx_load_microcode()1988 amdgpu_ucode_print_gfx_hdr(&ce_hdr->header); in gfx_v6_0_cp_gfx_load_microcode()2002 (adev->gfx.ce_fw->data + le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes)); in gfx_v6_0_cp_gfx_load_microcode()2003 fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes) / 4; in gfx_v6_0_cp_gfx_load_microcode()
2533 const struct gfx_firmware_header_v1_0 *ce_hdr; in gfx_v10_0_cp_gfx_load_ce_microcode() local2539 ce_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v10_0_cp_gfx_load_ce_microcode()2542 amdgpu_ucode_print_gfx_hdr(&ce_hdr->header); in gfx_v10_0_cp_gfx_load_ce_microcode()2545 le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_gfx_load_ce_microcode()2546 fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes); in gfx_v10_0_cp_gfx_load_ce_microcode()2548 r = amdgpu_bo_create_reserved(adev, ce_hdr->header.ucode_size_bytes, in gfx_v10_0_cp_gfx_load_ce_microcode()
3081 const struct gfx_firmware_header_v1_0 *ce_hdr; in gfx_v9_0_cp_gfx_load_microcode() local3091 ce_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v9_0_cp_gfx_load_microcode()3097 amdgpu_ucode_print_gfx_hdr(&ce_hdr->header); in gfx_v9_0_cp_gfx_load_microcode()3115 le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_gfx_load_microcode()3116 fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes) / 4; in gfx_v9_0_cp_gfx_load_microcode()
3492 const struct gfx_firmware_header_v1_0 *ce_hdr = in si_cp_load_microcode() local3500 radeon_ucode_print_gfx_hdr(&ce_hdr->header); in si_cp_load_microcode()3514 (rdev->ce_fw->data + le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes)); in si_cp_load_microcode()3515 fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes) / 4; in si_cp_load_microcode()
3910 const struct gfx_firmware_header_v1_0 *ce_hdr = in cik_cp_gfx_load_microcode() local3918 radeon_ucode_print_gfx_hdr(&ce_hdr->header); in cik_cp_gfx_load_microcode()3932 (rdev->ce_fw->data + le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes)); in cik_cp_gfx_load_microcode()3933 fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes) / 4; in cik_cp_gfx_load_microcode()3937 WREG32(CP_CE_UCODE_ADDR, le32_to_cpu(ce_hdr->header.ucode_version)); in cik_cp_gfx_load_microcode()