| /drivers/iio/adc/ |
| D | imx7d_adc.c | 234 u32 cfg2; in imx7d_adc_channel_set() local
256 cfg2 = readl(info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel + in imx7d_adc_channel_set()
259 cfg2 |= imx7d_adc_average_num[info->adc_feature.avg_num]; in imx7d_adc_channel_set()
265 writel(cfg2, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel + in imx7d_adc_channel_set()
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| /drivers/mmc/host/ |
| D | rtsx_pci_sdmmc.c | 436 u8 cfg2 = 0; in sd_read_long_data() local
449 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO; in sd_read_long_data()
468 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2 | resp_type); in sd_read_long_data()
494 u8 cfg2; in sd_write_long_data() local
505 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | in sd_write_long_data()
509 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO; in sd_write_long_data()
527 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2); in sd_write_long_data()
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| D | rtsx_usb_sdmmc.c | 454 u8 cfg2, trans_mode; in sd_rw_multi() local
463 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | in sd_rw_multi()
469 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | in sd_rw_multi()
506 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2); in sd_rw_multi()
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| /drivers/net/ethernet/agere/ |
| D | et131x.c | 870 u32 cfg2; in et1310_config_mac_regs2() local
876 cfg2 = readl(&mac->cfg2); in et1310_config_mac_regs2()
880 cfg2 &= ~ET_MAC_CFG2_IFMODE_MASK; in et1310_config_mac_regs2()
882 cfg2 |= ET_MAC_CFG2_IFMODE_1000; in et1310_config_mac_regs2()
885 cfg2 |= ET_MAC_CFG2_IFMODE_100; in et1310_config_mac_regs2()
901 cfg2 |= 0x7 << ET_MAC_CFG2_PREAMBLE_SHIFT; in et1310_config_mac_regs2()
902 cfg2 |= ET_MAC_CFG2_IFMODE_LEN_CHECK; in et1310_config_mac_regs2()
903 cfg2 |= ET_MAC_CFG2_IFMODE_PAD_CRC; in et1310_config_mac_regs2()
904 cfg2 |= ET_MAC_CFG2_IFMODE_CRC_ENABLE; in et1310_config_mac_regs2()
905 cfg2 &= ~ET_MAC_CFG2_IFMODE_HUGE_FRAME; in et1310_config_mac_regs2()
[all …]
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| D | et131x.h | 1049 u32 cfg2; /* 0x5004 */ member
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| /drivers/net/ethernet/atheros/ |
| D | ag71xx.c | 851 u32 cfg2; in ag71xx_link_adjust() local
863 cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); in ag71xx_link_adjust()
864 cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX); in ag71xx_link_adjust()
865 cfg2 |= (phydev->duplex) ? MAC_CFG2_FDX : 0; in ag71xx_link_adjust()
875 cfg2 |= MAC_CFG2_IF_1000; in ag71xx_link_adjust()
879 cfg2 |= MAC_CFG2_IF_10_100; in ag71xx_link_adjust()
883 cfg2 |= MAC_CFG2_IF_10_100; in ag71xx_link_adjust()
897 ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); in ag71xx_link_adjust()
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| /drivers/gpu/drm/exynos/ |
| D | exynos_drm_fimc.c | 420 u32 cfg1, cfg2; in fimc_src_set_transf() local
428 cfg2 = fimc_read(ctx, EXYNOS_CITRGFMT); in fimc_src_set_transf()
429 cfg2 &= ~EXYNOS_CITRGFMT_INROT90_CLOCKWISE; in fimc_src_set_transf()
439 cfg2 |= EXYNOS_CITRGFMT_INROT90_CLOCKWISE; in fimc_src_set_transf()
456 cfg2 |= EXYNOS_CITRGFMT_INROT90_CLOCKWISE; in fimc_src_set_transf()
465 fimc_write(ctx, cfg2, EXYNOS_CITRGFMT); in fimc_src_set_transf()
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| /drivers/media/platform/atmel/ |
| D | atmel-isi.c | 147 u32 cfg2, psize; in configure_geometry() local
154 cfg2 = isi->current_fmt->swap; in configure_geometry()
158 cfg2 |= ((isi->fmt.fmt.pix.width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) & in configure_geometry()
161 cfg2 |= ((isi->fmt.fmt.pix.height - 1) << ISI_CFG2_IM_VSIZE_OFFSET) in configure_geometry()
163 isi_writel(isi, ISI_CFG2, cfg2); in configure_geometry()
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| /drivers/hwmon/ |
| D | adt7462.c | 207 u8 cfg2; member
768 data->cfg2 = i2c_smbus_read_byte_data(client, ADT7462_REG_CFG2); in adt7462_update_device()
1056 return sprintf(buf, "%d\n", (data->cfg2 & ADT7462_FSPD_MASK ? 1 : 0)); in force_pwm_max_show()
1077 data->cfg2 = reg; in force_pwm_max_store()
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| /drivers/staging/rts5208/ |
| D | sd.c | 3291 u8 cfg2; local
3395 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3398 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
3430 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3434 cfg2);
3472 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3476 cfg2);
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| /drivers/net/ethernet/broadcom/ |
| D | tg3.c | 15179 u32 cfg2 = 0, cfg4 = 0, cfg5 = 0; in tg3_get_eeprom_hw_cfg() local
15192 tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2); in tg3_get_eeprom_hw_cfg()
15226 led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK | in tg3_get_eeprom_hw_cfg()
15320 if (cfg2 & (1 << 17)) in tg3_get_eeprom_hw_cfg()
15325 if (cfg2 & (1 << 18)) in tg3_get_eeprom_hw_cfg()
15331 (cfg2 & NIC_SRAM_DATA_CFG_2_APD_EN)) in tg3_get_eeprom_hw_cfg()
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| /drivers/scsi/ |
| D | dc395x.c | 198 u8 cfg2; /* Target configuration byte 2 */ member
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