| /drivers/clk/ |
| D | clk-divider.c | 469 u8 clk_divider_flags, const struct clk_div_table *table, in _register_divider() argument
477 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) { in _register_divider()
490 if (clk_divider_flags & CLK_DIVIDER_READ_ONLY) in _register_divider()
502 div->flags = clk_divider_flags; in _register_divider()
533 u8 clk_divider_flags, spinlock_t *lock) in clk_register_divider() argument
538 width, clk_divider_flags, NULL, lock); in clk_register_divider()
560 u8 clk_divider_flags, spinlock_t *lock) in clk_hw_register_divider() argument
563 width, clk_divider_flags, NULL, lock); in clk_hw_register_divider()
584 u8 clk_divider_flags, const struct clk_div_table *table, in clk_register_divider_table() argument
590 width, clk_divider_flags, table, lock); in clk_register_divider_table()
[all …]
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| D | clk-fractional-divider.c | 158 u8 clk_divider_flags, spinlock_t *lock) in clk_hw_register_fractional_divider() argument
182 fd->flags = clk_divider_flags; in clk_hw_register_fractional_divider()
200 u8 clk_divider_flags, spinlock_t *lock) in clk_register_fractional_divider() argument
205 reg, mshift, mwidth, nshift, nwidth, clk_divider_flags, in clk_register_fractional_divider()
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| D | clk-npcm7xx.c | 168 u8 clk_divider_flags; member
184 u8 clk_divider_flags; member
630 div_data->clk_divider_flags, &npcm7xx_clk_lock); in npcm7xx_clk_init()
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| D | clk-milbeaut.c | 460 u8 clk_divider_flags, const struct clk_div_table *table, in m10v_clk_hw_register_divider() argument
481 div->flags = clk_divider_flags; in m10v_clk_hw_register_divider()
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| D | clk-stm32f4.c | 748 u8 clk_divider_flags, const struct clk_div_table *table, in clk_register_pll_div() argument
771 pll_div->div.flags = clk_divider_flags; in clk_register_pll_div()
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| /drivers/clk/ti/ |
| D | divider.c | 318 u8 clk_divider_flags, in _register_divider() argument
325 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) { in _register_divider()
348 div->flags = clk_divider_flags; in _register_divider()
578 u8 clk_divider_flags = 0; in of_ti_divider_clk_setup() local
588 &clk_divider_flags, &width, &shift, &latch)) in of_ti_divider_clk_setup()
592 shift, width, latch, clk_divider_flags, table); in of_ti_divider_clk_setup()
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| D | adpll.c | 254 u8 clk_divider_flags) in ti_adpll_init_divider() argument
266 reg, shift, width, clk_divider_flags, in ti_adpll_init_divider()
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| /drivers/clk/imx/ |
| D | clk-divider-gate.c | 178 u8 shift, u8 width, u8 clk_divider_flags, in imx_clk_divider_gate() argument
193 if (clk_divider_flags & CLK_DIVIDER_READ_ONLY) in imx_clk_divider_gate()
207 div_gate->divider.flags = CLK_DIVIDER_ONE_BASED | clk_divider_flags; in imx_clk_divider_gate()
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| D | clk.h | 464 u8 clk_divider_flags, const struct clk_div_table *table,
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| /drivers/clk/tegra/ |
| D | clk-divider.c | 120 unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, in tegra_clk_register_divider() argument
145 divider->flags = clk_divider_flags; in tegra_clk_register_divider()
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| D | clk.h | 77 unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,
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| /drivers/clk/mediatek/ |
| D | clk-mtk.h | 186 unsigned char clk_divider_flags; member
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| D | clk-mtk.c | 277 mcd->div_width, mcd->clk_divider_flags, lock); in mtk_clk_register_dividers()
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