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Searched refs:clk_src (Results 1 – 25 of 32) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clock_source.c43 (clk_src->regs->reg)
46 clk_src->base.ctx
52 clk_src->cs_shift->field_name, clk_src->cs_mask->field_name
61 struct dce110_clk_src *clk_src, in get_ss_data_entry() argument
74 ss_parm = clk_src->dvi_ss_params; in get_ss_data_entry()
75 entrys_num = clk_src->dvi_ss_params_cnt; in get_ss_data_entry()
79 ss_parm = clk_src->hdmi_ss_params; in get_ss_data_entry()
80 entrys_num = clk_src->hdmi_ss_params_cnt; in get_ss_data_entry()
84 ss_parm = clk_src->lvds_ss_params; in get_ss_data_entry()
85 entrys_num = clk_src->lvds_ss_params_cnt; in get_ss_data_entry()
[all …]
Ddce_hwseq.c167 struct clock_source *clk_src, in dce_crtc_switch_to_clk_src() argument
170 if (clk_src->id == CLOCK_SOURCE_ID_DP_DTO || clk_src->dp_clk_src) { in dce_crtc_switch_to_clk_src()
174 } else if (clk_src->id >= CLOCK_SOURCE_COMBO_PHY_PLL0) { in dce_crtc_switch_to_clk_src()
175 uint32_t rate_source = clk_src->id - CLOCK_SOURCE_COMBO_PHY_PLL0; in dce_crtc_switch_to_clk_src()
184 } else if (clk_src->id <= CLOCK_SOURCE_ID_PLL2) { in dce_crtc_switch_to_clk_src()
185 uint32_t rate_source = clk_src->id - CLOCK_SOURCE_ID_PLL0; in dce_crtc_switch_to_clk_src()
196 clk_src->id, tg_inst); in dce_crtc_switch_to_clk_src()
Ddce_clock_source.h30 #define TO_DCE110_CLK_SRC(clk_src)\ argument
31 container_of(clk_src, struct dce110_clk_src, base)
187 struct dce110_clk_src *clk_src,
196 struct dce110_clk_src *clk_src,
206 struct dce110_clk_src *clk_src,
/drivers/gpu/drm/omapdrm/dss/
Ddss.c66 enum dss_clk_source clk_src);
177 enum dss_clk_source clk_src, in dss_ctrl_pll_set_control_mux() argument
189 switch (clk_src) { in dss_ctrl_pll_set_control_mux()
203 switch (clk_src) { in dss_ctrl_pll_set_control_mux()
219 switch (clk_src) { in dss_ctrl_pll_set_control_mux()
330 const char *dss_get_clk_source_name(enum dss_clk_source clk_src) in dss_get_clk_source_name() argument
332 return dss_generic_clk_source_names[clk_src]; in dss_get_clk_source_name()
405 enum dss_clk_source clk_src) in dss_select_dispc_clk_source() argument
413 if (WARN_ON(dss->feat->has_lcd_clk_src && clk_src != DSS_CLK_SRC_FCK)) in dss_select_dispc_clk_source()
416 switch (clk_src) { in dss_select_dispc_clk_source()
[all …]
Ddpi.c34 enum dss_clk_source clk_src; member
224 ctx->clkout_idx = dss_pll_get_clkout_idx_for_src(dpi->clk_src); in dpi_pll_clk_calc()
302 dss_select_lcd_clk_source(dpi->dss, channel, dpi->clk_src); in dpi_set_pll_clk()
525 dpi->clk_src = dpi_get_clk_src(dpi); in dpi_init_pll()
527 pll = dss_pll_find_by_src(dpi->dss, dpi->clk_src); in dpi_init_pll()
Ddss.h313 const char *dss_get_clk_source_name(enum dss_clk_source clk_src);
328 enum dss_clk_source clk_src);
331 enum dss_clk_source clk_src);
/drivers/ptp/
Dptp_qoriq.c359 static u32 ptp_qoriq_nominal_freq(u32 clk_src) in ptp_qoriq_nominal_freq() argument
363 clk_src /= 1000000; in ptp_qoriq_nominal_freq()
364 remainder = clk_src % 100; in ptp_qoriq_nominal_freq()
366 clk_src -= remainder; in ptp_qoriq_nominal_freq()
367 clk_src += 100; in ptp_qoriq_nominal_freq()
371 clk_src -= 100; in ptp_qoriq_nominal_freq()
373 } while (1000 % clk_src); in ptp_qoriq_nominal_freq()
375 return clk_src * 1000000; in ptp_qoriq_nominal_freq()
403 u32 clk_src = 0; in ptp_qoriq_auto_config() local
409 clk_src = clk_get_rate(clk); in ptp_qoriq_auto_config()
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/drivers/staging/comedi/drivers/
Dni_tio.c304 unsigned int *clk_src) in ni_m_series_clock_src_select() argument
366 *clk_src = clock_source; in ni_m_series_clock_src_select()
371 unsigned int *clk_src) in ni_660x_clock_src_select() argument
424 *clk_src = clock_source; in ni_660x_clock_src_select()
429 unsigned int *clk_src) in ni_tio_generic_clock_src_select() argument
435 return ni_m_series_clock_src_select(counter, clk_src); in ni_tio_generic_clock_src_select()
437 return ni_660x_clock_src_select(counter, clk_src); in ni_tio_generic_clock_src_select()
450 unsigned int clk_src = 0; in ni_tio_set_sync_mode() local
482 ret = ni_tio_generic_clock_src_select(counter, &clk_src); in ni_tio_set_sync_mode()
485 ret = ni_tio_clock_period_ps(counter, clk_src, &ps); in ni_tio_set_sync_mode()
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Daddi_apci_1500.c47 unsigned int clk_src; member
652 devpriv->clk_src = data[1]; in apci1500_timer_insn_config()
653 if (devpriv->clk_src == 2) in apci1500_timer_insn_config()
654 devpriv->clk_src = 3; in apci1500_timer_insn_config()
655 outw(devpriv->clk_src, devpriv->addon + APCI1500_CLK_SEL_REG); in apci1500_timer_insn_config()
658 switch (devpriv->clk_src) { in apci1500_timer_insn_config()
Damplc_pci230.c662 unsigned int clk_src, cnt; in pci230_choose_clk_count() local
664 for (clk_src = CLK_10MHZ;; clk_src++) { in pci230_choose_clk_count()
665 cnt = pci230_divide_ns(ns, pci230_timebase[clk_src], flags); in pci230_choose_clk_count()
666 if (cnt <= 65536 || clk_src == CLK_1KHZ) in pci230_choose_clk_count()
670 return clk_src; in pci230_choose_clk_count()
676 unsigned int clk_src; in pci230_ns_to_single_timer() local
678 clk_src = pci230_choose_clk_count(*ns, &count, flags); in pci230_ns_to_single_timer()
679 *ns = count * pci230_timebase[clk_src]; in pci230_ns_to_single_timer()
686 unsigned int clk_src; in pci230_ct_setup_ns_mode() local
692 clk_src = pci230_choose_clk_count(ns, &count, flags); in pci230_ct_setup_ns_mode()
[all …]
/drivers/video/fbdev/omap2/omapfb/dss/
Ddss.c346 const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src) in dss_get_generic_clk_source_name() argument
348 return dss_generic_clk_source_names[clk_src]; in dss_get_generic_clk_source_name()
395 static void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src) in dss_select_dispc_clk_source() argument
400 switch (clk_src) { in dss_select_dispc_clk_source()
419 dss.dispc_clk_source = clk_src; in dss_select_dispc_clk_source()
423 enum omap_dss_clk_source clk_src) in dss_select_dsi_clk_source() argument
427 switch (clk_src) { in dss_select_dsi_clk_source()
447 dss.dsi_clk_source[dsi_module] = clk_src; in dss_select_dsi_clk_source()
451 enum omap_dss_clk_source clk_src) in dss_select_lcd_clk_source() argument
456 dss_select_dispc_clk_source(clk_src); in dss_select_lcd_clk_source()
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Ddss.h269 const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
294 enum omap_dss_clk_source clk_src);
296 enum omap_dss_clk_source clk_src);
/drivers/clk/socfpga/
Dclk-periph.c39 u32 clk_src; in clk_periclk_get_parent() local
41 clk_src = readl(clk_mgr_base_addr + CLKMGR_DBCTRL); in clk_periclk_get_parent()
42 return clk_src & 0x1; in clk_periclk_get_parent()
Dclk-periph-a10.c42 u32 clk_src; in clk_periclk_get_parent() local
45 clk_src = readl(socfpgaclk->hw.reg); in clk_periclk_get_parent()
49 return (clk_src >> CLK_MGR_FREE_SHIFT) & in clk_periclk_get_parent()
Dclk-periph-s10.c51 u32 clk_src, mask; in clk_periclk_get_parent() local
59 clk_src = readl(socfpgaclk->hw.reg); in clk_periclk_get_parent()
60 parent = (clk_src >> CLK_MGR_FREE_SHIFT) & in clk_periclk_get_parent()
/drivers/clk/
Dclk-nomadik.c154 struct clk_src { struct
162 #define to_src(_hw) container_of(_hw, struct clk_src, hw) argument
302 struct clk_src *sclk = to_src(hw); in src_clk_enable()
315 struct clk_src *sclk = to_src(hw); in src_clk_disable()
327 struct clk_src *sclk = to_src(hw); in src_clk_is_enabled()
353 struct clk_src *sclk; in src_clk_register()
/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_resource.c659 struct dce110_clk_src *clk_src = in dce100_clock_source_create() local
662 if (!clk_src) in dce100_clock_source_create()
665 if (dce110_clk_src_construct(clk_src, ctx, bios, id, in dce100_clock_source_create()
667 clk_src->base.dp_clk_src = dp_clk_src; in dce100_clock_source_create()
668 return &clk_src->base; in dce100_clock_source_create()
671 kfree(clk_src); in dce100_clock_source_create()
676 void dce100_clock_source_destroy(struct clock_source **clk_src) in dce100_clock_source_destroy() argument
678 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dce100_clock_source_destroy()
679 *clk_src = NULL; in dce100_clock_source_destroy()
/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_resource.c491 struct dce110_clk_src *clk_src = in dce120_clock_source_create() local
492 kzalloc(sizeof(*clk_src), GFP_KERNEL); in dce120_clock_source_create()
494 if (!clk_src) in dce120_clock_source_create()
497 if (dce112_clk_src_construct(clk_src, ctx, bios, id, in dce120_clock_source_create()
499 clk_src->base.dp_clk_src = dp_clk_src; in dce120_clock_source_create()
500 return &clk_src->base; in dce120_clock_source_create()
503 kfree(clk_src); in dce120_clock_source_create()
508 static void dce120_clock_source_destroy(struct clock_source **clk_src) in dce120_clock_source_destroy() argument
510 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dce120_clock_source_destroy()
511 *clk_src = NULL; in dce120_clock_source_destroy()
/drivers/i2c/busses/
Di2c-mt65xx.c439 static int mtk_i2c_calculate_speed(struct mtk_i2c *i2c, unsigned int clk_src, in mtk_i2c_calculate_speed() argument
463 opt_div = DIV_ROUND_UP(clk_src >> 1, target_speed); in mtk_i2c_calculate_speed()
490 if ((clk_src / (2 * sample_cnt * step_cnt)) > target_speed) { in mtk_i2c_calculate_speed()
506 unsigned int clk_src; in mtk_i2c_set_speed() local
514 clk_src = parent_clk / i2c->clk_src_div; in mtk_i2c_set_speed()
519 ret = mtk_i2c_calculate_speed(i2c, clk_src, MAX_FS_MODE_SPEED, in mtk_i2c_set_speed()
527 ret = mtk_i2c_calculate_speed(i2c, clk_src, target_speed, in mtk_i2c_set_speed()
539 ret = mtk_i2c_calculate_speed(i2c, clk_src, target_speed, in mtk_i2c_set_speed()
/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_resource.c705 struct dce110_clk_src *clk_src = in dce110_clock_source_create() local
708 if (!clk_src) in dce110_clock_source_create()
711 if (dce110_clk_src_construct(clk_src, ctx, bios, id, in dce110_clock_source_create()
713 clk_src->base.dp_clk_src = dp_clk_src; in dce110_clock_source_create()
714 return &clk_src->base; in dce110_clock_source_create()
717 kfree(clk_src); in dce110_clock_source_create()
722 void dce110_clock_source_destroy(struct clock_source **clk_src) in dce110_clock_source_destroy() argument
726 if (!clk_src) in dce110_clock_source_destroy()
729 dce110_clk_src = TO_DCE110_CLK_SRC(*clk_src); in dce110_clock_source_destroy()
736 *clk_src = NULL; in dce110_clock_source_destroy()
/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_resource.c678 struct dce110_clk_src *clk_src = in dce112_clock_source_create() local
681 if (!clk_src) in dce112_clock_source_create()
684 if (dce112_clk_src_construct(clk_src, ctx, bios, id, in dce112_clock_source_create()
686 clk_src->base.dp_clk_src = dp_clk_src; in dce112_clock_source_create()
687 return &clk_src->base; in dce112_clock_source_create()
690 kfree(clk_src); in dce112_clock_source_create()
695 void dce112_clock_source_destroy(struct clock_source **clk_src) in dce112_clock_source_destroy() argument
697 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dce112_clock_source_destroy()
698 *clk_src = NULL; in dce112_clock_source_destroy()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_resource.c777 struct dce110_clk_src *clk_src = in dcn10_clock_source_create() local
780 if (!clk_src) in dcn10_clock_source_create()
783 if (dce112_clk_src_construct(clk_src, ctx, bios, id, in dcn10_clock_source_create()
785 clk_src->base.dp_clk_src = dp_clk_src; in dcn10_clock_source_create()
786 return &clk_src->base; in dcn10_clock_source_create()
789 kfree(clk_src); in dcn10_clock_source_create()
868 void dcn10_clock_source_destroy(struct clock_source **clk_src) in dcn10_clock_source_destroy() argument
870 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dcn10_clock_source_destroy()
871 *clk_src = NULL; in dcn10_clock_source_destroy()
/drivers/gpu/drm/amd/display/dc/dce80/
Ddce80_resource.c692 struct dce110_clk_src *clk_src = in dce80_clock_source_create() local
695 if (!clk_src) in dce80_clock_source_create()
698 if (dce110_clk_src_construct(clk_src, ctx, bios, id, in dce80_clock_source_create()
700 clk_src->base.dp_clk_src = dp_clk_src; in dce80_clock_source_create()
701 return &clk_src->base; in dce80_clock_source_create()
704 kfree(clk_src); in dce80_clock_source_create()
709 void dce80_clock_source_destroy(struct clock_source **clk_src) in dce80_clock_source_destroy() argument
711 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dce80_clock_source_destroy()
712 *clk_src = NULL; in dce80_clock_source_destroy()
/drivers/iio/adc/
Dstm32-dfsdm-core.c135 unsigned int clk_div = priv->spi_clk_out_div, clk_src; in stm32_dfsdm_start_dfsdm() local
146 clk_src = priv->aclk ? 1 : 0; in stm32_dfsdm_start_dfsdm()
149 DFSDM_CHCFGR1_CKOUTSRC(clk_src)); in stm32_dfsdm_start_dfsdm()
/drivers/mmc/host/
Dalcor.c656 u16 clk_src = 0; in alcor_set_clock() local
677 clk_src = cfg->clk_src_reg; in alcor_set_clock()
682 clk_src |= ((clk_div - 1) << 8); in alcor_set_clock()
683 clk_src |= AU6601_CLK_ENABLE; in alcor_set_clock()
686 clock, tmp_clock, clk_div, clk_src); in alcor_set_clock()
688 alcor_write16(priv, clk_src, AU6601_CLK_SELECT); in alcor_set_clock()

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