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Searched refs:clk_v (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/radeon/
Drv740_dpm.c165 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in rv740_populate_sclk_value() local
172 cg_spll_spread_spectrum_2 |= CLK_V(clk_v); in rv740_populate_sclk_value()
254 u32 clk_v = 0x40000 * ss.percentage * in rv740_populate_mclk_value() local
258 mpll_ss1 |= CLKV(clk_v); in rv740_populate_mclk_value()
Drv730_dpm.c97 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv730_populate_sclk_value() local
104 cg_spll_spread_spectrum_2 |= CLK_V(clk_v); in rv730_populate_sclk_value()
173 u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000); in rv730_populate_mclk_value() local
180 mpll_ss |= CLK_V(clk_v); in rv730_populate_mclk_value()
Dr600_dpm.c968 ATOM_PPLIB_Clock_Voltage_Limit_Table *clk_v = in r600_parse_extended_power_table() local
972 if (clk_v->ucNumEntries) { in r600_parse_extended_power_table()
974 le16_to_cpu(clk_v->entries[0].usSclkLow) | in r600_parse_extended_power_table()
975 (clk_v->entries[0].ucSclkHigh << 16); in r600_parse_extended_power_table()
977 le16_to_cpu(clk_v->entries[0].usMclkLow) | in r600_parse_extended_power_table()
978 (clk_v->entries[0].ucMclkHigh << 16); in r600_parse_extended_power_table()
980 le16_to_cpu(clk_v->entries[0].usVddc); in r600_parse_extended_power_table()
982 le16_to_cpu(clk_v->entries[0].usVddci); in r600_parse_extended_power_table()
Drv6xx_dpm.c322 u32 index, u32 clk_v) in rv6xx_set_engine_spread_spectrum_clk_v() argument
325 CLKV(clk_v), ~CLKV_MASK); in rv6xx_set_engine_spread_spectrum_clk_v()
346 u32 clk_v) in rv6xx_set_memory_spread_spectrum_clk_v() argument
348 WREG32_P(CG_MPLL_SPREAD_SPECTRUM, CLKV(clk_v), ~CLKV_MASK); in rv6xx_set_memory_spread_spectrum_clk_v()
555 u32 vco_freq, clk_v, clk_s; in rv6xx_program_engine_spread_spectrum() local
566 clk_v = rv6xx_calculate_spread_spectrum_clk_v(vco_freq, in rv6xx_program_engine_spread_spectrum()
575 rv6xx_set_engine_spread_spectrum_clk_v(rdev, level, clk_v); in rv6xx_program_engine_spread_spectrum()
658 u32 vco_freq = 0, clk_v, clk_s; in rv6xx_program_mclk_spread_spectrum_parameters() local
684 clk_v = rv6xx_calculate_spread_spectrum_clk_v(vco_freq, in rv6xx_program_mclk_spread_spectrum_parameters()
693 rv6xx_set_memory_spread_spectrum_clk_v(rdev, clk_v); in rv6xx_program_mclk_spread_spectrum_parameters()
Dni_dpm.c2047 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in ni_calculate_sclk_params() local
2054 cg_spll_spread_spectrum_2 |= CLK_V(clk_v); in ni_calculate_sclk_params()
2099 u32 clk_v; in ni_init_smc_spll_table() local
2119 clk_v = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM_2 & CLK_V_MASK) >> CLK_V_SHIFT; in ni_init_smc_spll_table()
2123 clk_v >>= 6; in ni_init_smc_spll_table()
2134 if (clk_v & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT)) in ni_init_smc_spll_table()
2144 …tmp = ((clk_v << SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT) & SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_MASK) | in ni_init_smc_spll_table()
2245 u32 clk_v = ss.percentage * in ni_populate_mclk_value() local
2249 mpll_ss1 |= CLKV(clk_v); in ni_populate_mclk_value()
Dsi_dpm.c2854 u32 clk_s, clk_v; in si_init_smc_spll_table() local
2875 clk_v = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM_2 & CLK_V_MASK) >> CLK_V_SHIFT; in si_init_smc_spll_table()
2879 clk_v >>= 6; in si_init_smc_spll_table()
2887 if (clk_v & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT)) in si_init_smc_spll_table()
2897 …tmp = ((clk_v << SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK) | in si_init_smc_spll_table()
4830 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in si_calculate_sclk_params() local
4837 cg_spll_spread_spectrum_2 |= CLK_V(clk_v); in si_calculate_sclk_params()
Dcypress_dpm.c563 u32 clk_v = ss.percentage * in cypress_populate_mclk_value() local
567 mpll_ss1 |= CLKV(clk_v); in cypress_populate_mclk_value()
Drv770_dpm.c544 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv770_populate_sclk_value() local
551 cg_spll_spread_spectrum_2 |= CLKV(clk_v); in rv770_populate_sclk_value()
Dci_dpm.c3194 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in ci_calculate_sclk_params() local
3201 cg_spll_spread_spectrum_2 |= CLK_V(clk_v); in ci_calculate_sclk_params()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_dpm.c375 ATOM_PPLIB_Clock_Voltage_Limit_Table *clk_v = in amdgpu_parse_extended_power_table() local
379 if (clk_v->ucNumEntries) { in amdgpu_parse_extended_power_table()
381 le16_to_cpu(clk_v->entries[0].usSclkLow) | in amdgpu_parse_extended_power_table()
382 (clk_v->entries[0].ucSclkHigh << 16); in amdgpu_parse_extended_power_table()
384 le16_to_cpu(clk_v->entries[0].usMclkLow) | in amdgpu_parse_extended_power_table()
385 (clk_v->entries[0].ucMclkHigh << 16); in amdgpu_parse_extended_power_table()
387 le16_to_cpu(clk_v->entries[0].usVddc); in amdgpu_parse_extended_power_table()
389 le16_to_cpu(clk_v->entries[0].usVddci); in amdgpu_parse_extended_power_table()
Dsi_dpm.c2953 u32 clk_s, clk_v; in si_init_smc_spll_table() local
2973 clk_v = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM_2 & CLK_V_MASK) >> CLK_V_SHIFT; in si_init_smc_spll_table()
2977 clk_v >>= 6; in si_init_smc_spll_table()
2985 if (clk_v & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT)) in si_init_smc_spll_table()
2995 …tmp = ((clk_v << SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK) | in si_init_smc_spll_table()
5292 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in si_calculate_sclk_params() local
5299 cg_spll_spread_spectrum_2 |= CLK_V(clk_v); in si_calculate_sclk_params()
/drivers/gpu/drm/amd/powerplay/smumgr/
Dfiji_smumgr.c916 uint32_t clk_v = 4 * ssInfo.speed_spectrum_percentage * in fiji_calculate_sclk_params() local
924 CG_SPLL_SPREAD_SPECTRUM_2, CLKV, clk_v); in fiji_calculate_sclk_params()
Dci_smumgr.c347 uint32_t clk_v = 4 * ss_info.speed_spectrum_percentage * in ci_calculate_sclk_params() local
355 CG_SPLL_SPREAD_SPECTRUM_2, CLKV, clk_v); in ci_calculate_sclk_params()