Home
last modified time | relevance | path

Searched refs:clkrate (Results 1 – 20 of 20) sorted by relevance

/drivers/w1/masters/
Dmxc_w1.c94 unsigned long clkrate; in mxc_w1_probe() local
111 clkrate = clk_get_rate(mdev->clk); in mxc_w1_probe()
112 if (clkrate < 10000000) in mxc_w1_probe()
116 clkdiv = DIV_ROUND_CLOSEST(clkrate, 1000000); in mxc_w1_probe()
117 clkrate /= clkdiv; in mxc_w1_probe()
118 if ((clkrate < 980000) || (clkrate > 1020000)) in mxc_w1_probe()
120 "Incorrect time base frequency %lu Hz\n", clkrate); in mxc_w1_probe()
/drivers/watchdog/
Dst_lpc_wdt.c47 unsigned long clkrate; member
83 unsigned long clkrate = st_wdog->clkrate; in st_wdog_load_timer() local
85 writel_relaxed(timeout * clkrate, st_wdog->base + LPC_LPA_LSB_OFF); in st_wdog_load_timer()
204 st_wdog->clkrate = clk_get_rate(st_wdog->clk); in st_wdog_probe()
206 if (!st_wdog->clkrate) { in st_wdog_probe()
210 st_wdog_dev.max_timeout = 0xFFFFFFFF / st_wdog->clkrate; in st_wdog_probe()
/drivers/i2c/busses/
Di2c-lpc2k.c352 u32 clkrate; in i2c_lpc2k_probe() local
401 clkrate = clk_get_rate(i2c->clk); in i2c_lpc2k_probe()
402 if (clkrate == 0) { in i2c_lpc2k_probe()
409 clkrate = clkrate / bus_clk_rate; in i2c_lpc2k_probe()
411 scl_high = (clkrate * I2C_STD_MODE_DUTY) / 100; in i2c_lpc2k_probe()
413 scl_high = (clkrate * I2C_FAST_MODE_DUTY) / 100; in i2c_lpc2k_probe()
415 scl_high = (clkrate * I2C_FAST_MODE_PLUS_DUTY) / 100; in i2c_lpc2k_probe()
418 writel(clkrate - scl_high, i2c->base + LPC24XX_I2SCLL); in i2c_lpc2k_probe()
Di2c-stu300.c477 static int stu300_set_clk(struct stu300_dev *dev, unsigned long clkrate) in stu300_set_clk() argument
485 stu300_clktable[i].rate < clkrate) in stu300_set_clk()
490 "(%lu Hz).\n", i ? "high" : "low", clkrate); in stu300_set_clk()
498 "virtbase %p\n", clkrate, dev->speed, dev->virtbase); in stu300_set_clk()
502 val = ((clkrate/dev->speed) - 9)/3 + 1; in stu300_set_clk()
505 val = ((clkrate/dev->speed) - 7)/2 + 1; in stu300_set_clk()
510 clkrate); in stu300_set_clk()
517 clkrate); in stu300_set_clk()
546 unsigned long clkrate; in stu300_init_hw() local
563 clkrate = clk_get_rate(dev->clk); in stu300_init_hw()
[all …]
Di2c-s3c2410.c108 unsigned long clkrate; member
837 i2c->clkrate = clkin; in s3c24xx_i2c_clockrate()
901 delta_f = clk_get_rate(i2c->clk) - i2c->clkrate; in s3c24xx_i2c_cpufreq_transition()
Di2c-omap.c1394 omap->speed = pdata->clkrate; in omap_i2c_probe()
/drivers/rtc/
Drtc-st-lpc.c46 unsigned long clkrate; member
97 do_div(lpt, rtc->clkrate); in st_rtc_read_time()
111 lpt = (unsigned long long)secs * rtc->clkrate; in st_rtc_set_time()
169 lpa = (unsigned long long)alarm_secs * rtc->clkrate; in st_rtc_set_alarm()
242 rtc->clkrate = clk_get_rate(rtc->clk); in st_rtc_probe()
243 if (!rtc->clkrate) { in st_rtc_probe()
254 do_div(rtc->rtc_dev->range_max, rtc->clkrate); in st_rtc_probe()
/drivers/mtd/nand/raw/
Dlpc32xx_mlc.c234 uint32_t clkrate, tmp; in lpc32xx_nand_setup() local
241 clkrate = clk_get_rate(host->clk); in lpc32xx_nand_setup()
242 if (clkrate == 0) in lpc32xx_nand_setup()
243 clkrate = 104000000; in lpc32xx_nand_setup()
259 tmp |= MLCTIMEREG_TCEA_DELAY(clkrate / host->ncfg->tcea_delay + 1); in lpc32xx_nand_setup()
260 tmp |= MLCTIMEREG_BUSY_DELAY(clkrate / host->ncfg->busy_delay + 1); in lpc32xx_nand_setup()
261 tmp |= MLCTIMEREG_NAND_TA(clkrate / host->ncfg->nand_ta + 1); in lpc32xx_nand_setup()
262 tmp |= MLCTIMEREG_RD_HIGH(clkrate / host->ncfg->rd_high + 1); in lpc32xx_nand_setup()
263 tmp |= MLCTIMEREG_RD_LOW(clkrate / host->ncfg->rd_low); in lpc32xx_nand_setup()
264 tmp |= MLCTIMEREG_WR_HIGH(clkrate / host->ncfg->wr_high + 1); in lpc32xx_nand_setup()
[all …]
Dlpc32xx_slc.c240 uint32_t clkrate, tmp; in lpc32xx_nand_setup() local
253 clkrate = clk_get_rate(host->clk); in lpc32xx_nand_setup()
254 if (clkrate == 0) in lpc32xx_nand_setup()
255 clkrate = LPC32XX_DEF_BUS_RATE; in lpc32xx_nand_setup()
259 SLCTAC_WWIDTH(clkrate, host->ncfg->wwidth) | in lpc32xx_nand_setup()
260 SLCTAC_WHOLD(clkrate, host->ncfg->whold) | in lpc32xx_nand_setup()
261 SLCTAC_WSETUP(clkrate, host->ncfg->wsetup) | in lpc32xx_nand_setup()
263 SLCTAC_RWIDTH(clkrate, host->ncfg->rwidth) | in lpc32xx_nand_setup()
264 SLCTAC_RHOLD(clkrate, host->ncfg->rhold) | in lpc32xx_nand_setup()
265 SLCTAC_RSETUP(clkrate, host->ncfg->rsetup); in lpc32xx_nand_setup()
Ds3c2410.c293 unsigned long clkrate = clk_get_rate(info->clk); in s3c2410_nand_setrate() local
299 info->clk_rate = clkrate; in s3c2410_nand_setrate()
300 clkrate /= 1000; /* turn clock into kHz for ease of use */ in s3c2410_nand_setrate()
303 tacls = s3c_nand_calc_rate(plat->tacls, clkrate, tacls_max); in s3c2410_nand_setrate()
304 twrph0 = s3c_nand_calc_rate(plat->twrph0, clkrate, 8); in s3c2410_nand_setrate()
305 twrph1 = s3c_nand_calc_rate(plat->twrph1, clkrate, 8); in s3c2410_nand_setrate()
319 tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), in s3c2410_nand_setrate()
320 twrph1, to_ns(twrph1, clkrate)); in s3c2410_nand_setrate()
/drivers/spi/
Dspi-npcm-fiu.c222 unsigned long clkrate; member
232 unsigned long clkrate; member
541 if (fiu->clkrate != chip->clkrate) { in npcm_fiu_exec_op()
542 ret = clk_set_rate(fiu->clk, chip->clkrate); in npcm_fiu_exec_op()
545 chip->clkrate, fiu->clkrate); in npcm_fiu_exec_op()
547 fiu->clkrate = chip->clkrate; in npcm_fiu_exec_op()
652 chip->clkrate = spi->max_speed_hz; in npcm_fiu_setup()
654 fiu->clkrate = clk_get_rate(fiu->clk); in npcm_fiu_setup()
Dspi-fsl-dspi.c491 unsigned long clkrate) in hz_to_spi_baud() argument
502 scale_needed = clkrate / speed_hz; in hz_to_spi_baud()
503 if (clkrate % speed_hz) in hz_to_spi_baud()
521 speed_hz, clkrate); in hz_to_spi_baud()
528 unsigned long clkrate) in ns_delay_scale() argument
535 scale_needed = div_u64_rem((u64)delay_ns * clkrate, NSEC_PER_SEC, in ns_delay_scale()
555 delay_ns, clkrate); in ns_delay_scale()
830 unsigned long clkrate; in dspi_setup() local
855 clkrate = clk_get_rate(dspi->clk); in dspi_setup()
856 hz_to_spi_baud(&pbr, &br, spi->max_speed_hz, clkrate); in dspi_setup()
[all …]
/drivers/net/dsa/sja1105/
Dsja1105_ptp.c270 s64 clkrate; in sja1105_ptp_adjfine() local
272 clkrate = (s64)scaled_ppm * SJA1105_CC_MULT_NUM; in sja1105_ptp_adjfine()
273 clkrate = div_s64(clkrate, SJA1105_CC_MULT_DEM); in sja1105_ptp_adjfine()
305 priv->tstamp_cc.mult = SJA1105_CC_MULT + clkrate; in sja1105_ptp_adjfine()
/drivers/media/rc/
Dtango-ir.c162 u64 clkrate, clkdiv; in tango_ir_probe() local
213 clkrate = clk_get_rate(ir->clk); in tango_ir_probe()
215 clkdiv = clkrate * NEC_TIME_BASE; in tango_ir_probe()
221 clkdiv = clkrate * RC5_TIME_BASE; in tango_ir_probe()
228 clkdiv = clkrate * RC6_TIME_BASE; in tango_ir_probe()
/drivers/ata/
Dpata_imx.c59 unsigned long clkrate; in pata_imx_set_timing() local
62 clkrate = clk_get_rate(priv->clk); in pata_imx_set_timing()
65 !clkrate) in pata_imx_set_timing()
68 T = 1000000000 / clkrate; in pata_imx_set_timing()
/drivers/mmc/host/
Dpxamci.c56 unsigned long clkrate; member
175 clks = (unsigned long long)data->timeout_ns * host->clkrate; in pxamci_setup_data()
446 unsigned long rate = host->clkrate; in pxamci_set_ios()
665 host->clkrate = clk_get_rate(host->clk); in pxamci_probe()
670 mmc->f_min = (host->clkrate + 63) / 64; in pxamci_probe()
671 mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate; in pxamci_probe()
/drivers/gpu/drm/arc/
Darcpgu_drv.c118 unsigned long clkrate = clk_get_rate(arcpgu->clk); in arcpgu_show_pxlclock() local
121 seq_printf(m, "hw : %lu\n", clkrate); in arcpgu_show_pxlclock()
/drivers/gpu/ipu-v3/
Dipu-di.c444 unsigned long rate, clkrate; in ipu_di_config_clock() local
447 clkrate = clk_get_rate(di->clk_ipu); in ipu_di_config_clock()
448 div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock); in ipu_di_config_clock()
450 rate = clkrate / div; in ipu_di_config_clock()
/drivers/mtd/spi-nor/
Dhisi-sfc.c84 u32 clkrate; member
155 ret = clk_set_rate(host->clk, priv->clkrate); in hisi_spi_nor_prep()
352 &priv->clkrate); in hisi_spi_nor_register()
/drivers/gpu/drm/arm/
Dhdlcd_drv.c214 unsigned long clkrate = clk_get_rate(hdlcd->clk); in hdlcd_show_pxlclock() local
217 seq_printf(m, "hw : %lu\n", clkrate); in hdlcd_show_pxlclock()