| /drivers/net/ethernet/qlogic/qede/ |
| D | qede_ptp.c | 37 struct ptp_clock_info clock_info; member
65 struct qede_ptp *ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_adjfreq()
88 ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_adjtime()
107 ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_gettime()
128 ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_settime()
151 ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_ancillary_feature_enable()
492 ptp->clock_info.owner = THIS_MODULE; in qede_ptp_enable()
493 snprintf(ptp->clock_info.name, 16, "%s", edev->ndev->name); in qede_ptp_enable()
494 ptp->clock_info.max_adj = QED_MAX_PHC_DRIFT_PPB; in qede_ptp_enable()
495 ptp->clock_info.n_alarm = 0; in qede_ptp_enable()
[all …]
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| /drivers/net/ethernet/mellanox/mlx5/core/lib/ |
| D | clock.c | 80 struct mlx5_ib_clock_info *clock_info = mdev->clock_info; in mlx5_update_clock_info_page() local
84 if (!clock_info) in mlx5_update_clock_info_page()
87 sign = smp_load_acquire(&clock_info->sign); in mlx5_update_clock_info_page()
88 smp_store_mb(clock_info->sign, in mlx5_update_clock_info_page()
91 clock_info->cycles = clock->tc.cycle_last; in mlx5_update_clock_info_page()
92 clock_info->mult = clock->cycles.mult; in mlx5_update_clock_info_page()
93 clock_info->nsec = clock->tc.nsec; in mlx5_update_clock_info_page()
94 clock_info->frac = clock->tc.frac; in mlx5_update_clock_info_page()
96 smp_store_release(&clock_info->sign, in mlx5_update_clock_info_page()
555 mdev->clock_info = in mlx5_init_clock()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_atombios.c | 2086 &rdev->pm.power_state[state_index].clock_info[0]; in radeon_atombios_parse_misc_flags_1_3()
2088 rdev->pm.power_state[state_index].clock_info[0].flags |= in radeon_atombios_parse_misc_flags_1_3()
2139 rdev->pm.power_state[state_index].clock_info = in radeon_atombios_parse_power_table_1_3()
2142 if (!rdev->pm.power_state[state_index].clock_info) in radeon_atombios_parse_power_table_1_3()
2145 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; in radeon_atombios_parse_power_table_1_3()
2148 rdev->pm.power_state[state_index].clock_info[0].mclk = in radeon_atombios_parse_power_table_1_3()
2150 rdev->pm.power_state[state_index].clock_info[0].sclk = in radeon_atombios_parse_power_table_1_3()
2153 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || in radeon_atombios_parse_power_table_1_3()
2154 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) in radeon_atombios_parse_power_table_1_3()
2161 rdev->pm.power_state[state_index].clock_info[0].voltage.type = in radeon_atombios_parse_power_table_1_3()
[all …]
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| D | radeon_combios.c | 2652 rdev->pm.power_state[0].clock_info = in radeon_combios_get_power_modes()
2655 rdev->pm.power_state[1].clock_info = in radeon_combios_get_power_modes()
2658 if (!rdev->pm.power_state[0].clock_info || in radeon_combios_get_power_modes()
2659 !rdev->pm.power_state[1].clock_info) in radeon_combios_get_power_modes()
2737 rdev->pm.power_state[state_index].clock_info[0].mclk = RBIOS32(offset + 0x5 + 0x2); in radeon_combios_get_power_modes()
2738 rdev->pm.power_state[state_index].clock_info[0].sclk = RBIOS32(offset + 0x5 + 0x6); in radeon_combios_get_power_modes()
2739 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || in radeon_combios_get_power_modes()
2740 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) in radeon_combios_get_power_modes()
2750 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO; in radeon_combios_get_power_modes()
2752 rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = in radeon_combios_get_power_modes()
[all …]
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| D | rs780_dpm.c | 751 union pplib_clock_info *clock_info) in rs780_parse_pplib_clock_info() argument
756 sclk = le16_to_cpu(clock_info->rs780.usLowEngineClockLow); in rs780_parse_pplib_clock_info()
757 sclk |= clock_info->rs780.ucLowEngineClockHigh << 16; in rs780_parse_pplib_clock_info()
759 sclk = le16_to_cpu(clock_info->rs780.usHighEngineClockLow); in rs780_parse_pplib_clock_info()
760 sclk |= clock_info->rs780.ucHighEngineClockHigh << 16; in rs780_parse_pplib_clock_info()
762 switch (le16_to_cpu(clock_info->rs780.usVDDC)) { in rs780_parse_pplib_clock_info()
781 ps->flags = le32_to_cpu(clock_info->rs780.ulFlags); in rs780_parse_pplib_clock_info()
797 union pplib_clock_info *clock_info; in rs780_parse_power_table() local
826 clock_info = (union pplib_clock_info *) in rs780_parse_power_table()
842 clock_info); in rs780_parse_power_table()
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| D | rv770_dpm.c | 2175 union pplib_clock_info *clock_info) in rv7xx_parse_pplib_clock_info() argument
2197 sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2198 sclk |= clock_info->evergreen.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2199 mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow); in rv7xx_parse_pplib_clock_info()
2200 mclk |= clock_info->evergreen.ucMemoryClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2202 pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC); in rv7xx_parse_pplib_clock_info()
2203 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI); in rv7xx_parse_pplib_clock_info()
2204 pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags); in rv7xx_parse_pplib_clock_info()
2206 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2207 sclk |= clock_info->r600.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
[all …]
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| D | radeon_pm.c | 183 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
197 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
200 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
325 struct radeon_pm_clock_info *clock_info; in radeon_pm_print_states() local
340 clock_info = &(power_state->clock_info[j]); in radeon_pm_print_states()
344 clock_info->sclk * 10); in radeon_pm_print_states()
348 clock_info->sclk * 10, in radeon_pm_print_states()
349 clock_info->mclk * 10, in radeon_pm_print_states()
350 clock_info->voltage.voltage); in radeon_pm_print_states()
1246 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
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| D | trinity_dpm.c | 1710 union pplib_clock_info *clock_info) in trinity_parse_pplib_clock_info() argument
1717 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_pplib_clock_info()
1718 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in trinity_parse_pplib_clock_info()
1720 pl->vddc_index = clock_info->sumo.vddcIndex; in trinity_parse_pplib_clock_info()
1736 union pplib_clock_info *clock_info; in trinity_parse_power_table() local
1774 if (!rdev->pm.power_state[i].clock_info) in trinity_parse_power_table()
1790 clock_info = (union pplib_clock_info *) in trinity_parse_power_table()
1795 clock_info); in trinity_parse_power_table()
1809 clock_info = (union pplib_clock_info *) in trinity_parse_power_table()
1811 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_power_table()
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| D | rv6xx_dpm.c | 1818 union pplib_clock_info *clock_info) in rv6xx_parse_pplib_clock_info() argument
1838 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); in rv6xx_parse_pplib_clock_info()
1839 sclk |= clock_info->r600.ucEngineClockHigh << 16; in rv6xx_parse_pplib_clock_info()
1840 mclk = le16_to_cpu(clock_info->r600.usMemoryClockLow); in rv6xx_parse_pplib_clock_info()
1841 mclk |= clock_info->r600.ucMemoryClockHigh << 16; in rv6xx_parse_pplib_clock_info()
1845 pl->vddc = le16_to_cpu(clock_info->r600.usVDDC); in rv6xx_parse_pplib_clock_info()
1846 pl->flags = le32_to_cpu(clock_info->r600.ulFlags); in rv6xx_parse_pplib_clock_info()
1878 union pplib_clock_info *clock_info; in rv6xx_parse_power_table() local
1918 clock_info = (union pplib_clock_info *) in rv6xx_parse_power_table()
1924 clock_info); in rv6xx_parse_power_table()
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| D | sumo_dpm.c | 1431 union pplib_clock_info *clock_info) in sumo_parse_pplib_clock_info() argument
1438 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in sumo_parse_pplib_clock_info()
1439 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in sumo_parse_pplib_clock_info()
1441 pl->vddc_index = clock_info->sumo.vddcIndex; in sumo_parse_pplib_clock_info()
1442 pl->sclk_dpm_tdp_limit = clock_info->sumo.tdpLimit; in sumo_parse_pplib_clock_info()
1458 union pplib_clock_info *clock_info; in sumo_parse_power_table() local
1496 if (!rdev->pm.power_state[i].clock_info) in sumo_parse_power_table()
1511 clock_info = (union pplib_clock_info *) in sumo_parse_power_table()
1516 clock_info); in sumo_parse_power_table()
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| D | kv_dpm.c | 2613 union pplib_clock_info *clock_info) in kv_parse_pplib_clock_info() argument
2620 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_pplib_clock_info()
2621 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_pplib_clock_info()
2623 pl->vddc_index = clock_info->sumo.vddcIndex; in kv_parse_pplib_clock_info()
2639 union pplib_clock_info *clock_info; in kv_parse_power_table() local
2677 if (!rdev->pm.power_state[i].clock_info) in kv_parse_power_table()
2693 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2698 clock_info); in kv_parse_power_table()
2712 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2714 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_power_table()
[all …]
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| /drivers/clk/ingenic/ |
| D | cgu.c | 82 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_pll_recalc_rate()
151 clk_info = &cgu->clock_info[ingenic_clk->idx]; in to_clk_info()
294 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_get_parent()
323 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_set_parent()
372 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_recalc_rate()
446 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_round_rate()
469 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_set_rate()
528 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_enable()
550 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_disable()
568 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_is_enabled()
[all …]
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| D | cgu.h | 184 const struct ingenic_cgu_clk_info *clock_info; member
215 ingenic_cgu_new(const struct ingenic_cgu_clk_info *clock_info,
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_audio.c | 785 struct azalia_clock_info clock_info = { 0 }; in dce_aud_wall_dto_setup() local
799 &clock_info); in dce_aud_wall_dto_setup()
806 clock_info.audio_dto_module,\ in dce_aud_wall_dto_setup()
807 clock_info.audio_dto_phase); in dce_aud_wall_dto_setup()
824 DCCG_AUDIO_DTO0_MODULE, clock_info.audio_dto_module); in dce_aud_wall_dto_setup()
828 DCCG_AUDIO_DTO0_PHASE, clock_info.audio_dto_phase); in dce_aud_wall_dto_setup()
840 &clock_info); in dce_aud_wall_dto_setup()
856 DCCG_AUDIO_DTO1_MODULE, clock_info.audio_dto_module); in dce_aud_wall_dto_setup()
860 DCCG_AUDIO_DTO1_PHASE, clock_info.audio_dto_phase); in dce_aud_wall_dto_setup()
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| D | dce_stream_encoder.c | 1276 const struct audio_clock_info *clock_info; in get_audio_clock_info() local
1283 clock_info = audio_clock_info_table_48bpc; in get_audio_clock_info()
1288 clock_info = audio_clock_info_table_36bpc; in get_audio_clock_info()
1293 clock_info = audio_clock_info_table; in get_audio_clock_info()
1299 if (clock_info != NULL) { in get_audio_clock_info()
1302 if (clock_info[index].pixel_clock_in_10khz > in get_audio_clock_info()
1305 else if (clock_info[index].pixel_clock_in_10khz == in get_audio_clock_info()
1308 *audio_clock_info = clock_info[index]; in get_audio_clock_info()
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| /drivers/firmware/arm_scmi/ |
| D | clock.c | 67 struct clock_info { struct
75 struct clock_info *ci) in scmi_clock_protocol_attributes_get() argument
224 struct clock_info *ci = handle->clk_priv; in scmi_clock_rate_set()
287 struct clock_info *ci = handle->clk_priv; in scmi_clock_count_get()
295 struct clock_info *ci = handle->clk_priv; in scmi_clock_info_get()
317 struct clock_info *cinfo; in scmi_clock_protocol_init()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_stream_encoder.c | 1217 const struct audio_clock_info *clock_info; in get_audio_clock_info() local
1224 clock_info = audio_clock_info_table_48bpc; in get_audio_clock_info()
1229 clock_info = audio_clock_info_table_36bpc; in get_audio_clock_info()
1234 clock_info = audio_clock_info_table; in get_audio_clock_info()
1240 if (clock_info != NULL) { in get_audio_clock_info()
1243 if (clock_info[index].pixel_clock_in_10khz > in get_audio_clock_info()
1246 else if (clock_info[index].pixel_clock_in_10khz == in get_audio_clock_info()
1249 *audio_clock_info = clock_info[index]; in get_audio_clock_info()
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| /drivers/gpu/drm/amd/powerplay/hwmgr/ |
| D | processpptables.h | 37 const void *clock_info);
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| D | hardwaremanager.c | 400 …ks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) in phm_get_current_shallow_sleep_clocks() argument
407 return hwmgr->hwmgr_func->get_current_shallow_sleep_clocks(hwmgr, state, clock_info); in phm_get_current_shallow_sleep_clocks()
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| D | smu10_hwmgr.c | 751 const void *clock_info) in smu10_dpm_get_pp_table_entry_callback() argument
957 const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) in smu10_get_current_shallow_sleep_clocks() argument
961 clock_info->min_eng_clk = ps->levels[0].engine_clock / (1 << (ps->levels[0].ss_divider_index)); in smu10_get_current_shallow_sleep_clocks()
962 …clock_info->max_eng_clk = ps->levels[ps->level - 1].engine_clock / (1 << (ps->levels[ps->level - 1… in smu10_get_current_shallow_sleep_clocks()
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| /drivers/gpu/drm/omapdrm/dss/ |
| D | sdi.c | 140 sdi->mgr_config.clock_info = dispc_cinfo; in sdi_display_enable()
160 &sdi->mgr_config.clock_info); in sdi_display_enable()
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| D | dpi.c | 304 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_pll_clk()
328 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_dispc_clk()
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| /drivers/video/fbdev/omap2/omapfb/dss/ |
| D | sdi.c | 149 sdi.mgr_config.clock_info = dispc_cinfo; in sdi_display_enable()
180 dispc_mgr_set_clock_div(out->manager->id, &sdi.mgr_config.clock_info); in sdi_display_enable()
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| D | manager.c | 186 struct dispc_clock_info cinfo = config->clock_info; in dss_mgr_check_lcd_config()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | kv_dpm.c | 2681 union pplib_clock_info *clock_info) in kv_parse_pplib_clock_info() argument
2688 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_pplib_clock_info()
2689 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_pplib_clock_info()
2691 pl->vddc_index = clock_info->sumo.vddcIndex; in kv_parse_pplib_clock_info()
2707 union pplib_clock_info *clock_info; in kv_parse_power_table() local
2761 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2766 clock_info); in kv_parse_power_table()
2780 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2782 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_power_table()
2783 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_power_table()
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