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Searched refs:crtc_vdisplay (Results 1 – 25 of 55) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
Datombios_crtc.c56 args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
57 args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
62 a1 = mode->crtc_vdisplay * adjusted_mode->crtc_hdisplay; in amdgpu_atombios_crtc_overscan_setup()
63 a2 = adjusted_mode->crtc_vdisplay * mode->crtc_hdisplay; in amdgpu_atombios_crtc_overscan_setup()
66 …args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2); in amdgpu_atombios_crtc_overscan_setup()
67 …args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2… in amdgpu_atombios_crtc_overscan_setup()
69 … args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2); in amdgpu_atombios_crtc_overscan_setup()
70 …args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / … in amdgpu_atombios_crtc_overscan_setup()
204 args.usV_Size = cpu_to_le16(mode->crtc_vdisplay - (amdgpu_crtc->v_border * 2)); in amdgpu_atombios_crtc_set_dtd_timing()
206 cpu_to_le16(mode->crtc_vblank_end - mode->crtc_vdisplay + (amdgpu_crtc->v_border * 2)); in amdgpu_atombios_crtc_set_dtd_timing()
[all …]
Damdgpu_encoders.c177 adjusted_mode->crtc_vdisplay = native_mode->vdisplay; in amdgpu_panel_mode_fixup()
183 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank; in amdgpu_panel_mode_fixup()
184 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover; in amdgpu_panel_mode_fixup()
/drivers/gpu/drm/gma500/
Dmdfld_intel_display.c774 REG_WRITE(map->size, ((min(mode->crtc_vdisplay, adjusted_mode->crtc_vdisplay) - 1) << 16) in mdfld_crtc_mode_set()
778 | (mode->crtc_vdisplay - 1)); in mdfld_crtc_mode_set()
781 ((mode->crtc_vdisplay - 1) << 16) | in mdfld_crtc_mode_set()
785 (mode->crtc_vdisplay - 1)); in mdfld_crtc_mode_set()
803 offsetY = (adjusted_mode->crtc_vdisplay - in mdfld_crtc_mode_set()
804 mode->crtc_vdisplay) / 2; in mdfld_crtc_mode_set()
808 REG_WRITE(map->vtotal, (mode->crtc_vdisplay - 1) | in mdfld_crtc_mode_set()
825 REG_WRITE(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) | in mdfld_crtc_mode_set()
Doaktrail_crtc.c423 (mode->crtc_vdisplay - 1), i); in oaktrail_crtc_mode_set()
438 offsetY = (adjusted_mode->crtc_vdisplay - in oaktrail_crtc_mode_set()
439 mode->crtc_vdisplay) / 2; in oaktrail_crtc_mode_set()
444 REG_WRITE_WITH_AUX(map->vtotal, (mode->crtc_vdisplay - 1) | in oaktrail_crtc_mode_set()
463 REG_WRITE_WITH_AUX(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) | in oaktrail_crtc_mode_set()
Doaktrail_lvds.c131 if ((mode->vdisplay != adjusted_mode->crtc_vdisplay) || in oaktrail_lvds_mode_set()
134 (mode->hdisplay * adjusted_mode->crtc_vdisplay)) in oaktrail_lvds_mode_set()
138 adjusted_mode->crtc_vdisplay)) in oaktrail_lvds_mode_set()
Doaktrail_hdmi.c331 REG_WRITE(vtot_reg, (adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << 16)); in oaktrail_crtc_hdmi_mode_set()
334 REG_WRITE(pipesrc_reg, ((mode->crtc_hdisplay - 1) << 16) | (mode->crtc_vdisplay - 1)); in oaktrail_crtc_hdmi_mode_set()
339 …REG_WRITE(PCH_VTOTAL_B, (adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << … in oaktrail_crtc_hdmi_mode_set()
342 REG_WRITE(PCH_PIPEBSRC, ((mode->crtc_hdisplay - 1) << 16) | (mode->crtc_vdisplay - 1)); in oaktrail_crtc_hdmi_mode_set()
/drivers/gpu/drm/i915/display/
Dintel_panel.c186 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h && in intel_pch_panel_fitting()
195 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; in intel_pch_panel_fitting()
204 * adjusted_mode->crtc_vdisplay; in intel_pch_panel_fitting()
211 height = adjusted_mode->crtc_vdisplay; in intel_pch_panel_fitting()
216 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; in intel_pch_panel_fitting()
222 height = adjusted_mode->crtc_vdisplay; in intel_pch_panel_fitting()
230 height = adjusted_mode->crtc_vdisplay; in intel_pch_panel_fitting()
277 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; in centre_vertically()
279 adjusted_mode->crtc_vdisplay = height; in centre_vertically()
307 adjusted_mode->crtc_vdisplay; in i965_scale_aspect()
[all …]
Dintel_psr.c541 int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay; in intel_psr2_config_valid() local
565 if (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v) { in intel_psr2_config_valid()
567 crtc_hdisplay, crtc_vdisplay, in intel_psr2_config_valid()
637 adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) { in intel_psr_compute_config()
Ddvo_ivch.c419 mode->vdisplay != adjusted_mode->crtc_vdisplay) { in ivch_mode_set()
427 (adjusted_mode->crtc_vdisplay - 1)) >> 2; in ivch_mode_set()
Dvlv_dsi.c1072 adjusted_mode->crtc_vdisplay = in bxt_dsi_get_pipe_config()
1112 adjusted_mode->crtc_vsync_start = vfp + adjusted_mode->crtc_vdisplay; in bxt_dsi_get_pipe_config()
1114 adjusted_mode->crtc_vblank_start = adjusted_mode->crtc_vdisplay; in bxt_dsi_get_pipe_config()
1252 vfp = adjusted_mode->crtc_vsync_start - adjusted_mode->crtc_vdisplay; in set_dsi_timings()
1275 adjusted_mode->crtc_vdisplay); in set_dsi_timings()
1369 adjusted_mode->crtc_vdisplay << VERTICAL_ADDRESS_SHIFT | in intel_dsi_prepare()
Dintel_fbdev.c379 cur_size = crtc->state->adjusted_mode.crtc_vdisplay; in intel_fbdev_init_bios()
385 crtc->state->adjusted_mode.crtc_vdisplay, in intel_fbdev_init_bios()
Dintel_tv.c1094 int vdisplay = adjusted_mode->crtc_vdisplay; in intel_tv_get_config()
1176 return tv_mode->crtc_vdisplay - in intel_tv_vert_scaling()
1194 int vdisplay = adjusted_mode->crtc_vdisplay; in intel_tv_compute_config()
1216 extra = adjusted_mode->crtc_vdisplay - vdisplay; in intel_tv_compute_config()
/drivers/gpu/drm/radeon/
Datombios_crtc.c55 args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
56 args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
61 a1 = mode->crtc_vdisplay * adjusted_mode->crtc_hdisplay; in atombios_overscan_setup()
62 a2 = adjusted_mode->crtc_vdisplay * mode->crtc_hdisplay; in atombios_overscan_setup()
65 …args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2); in atombios_overscan_setup()
66 …args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2… in atombios_overscan_setup()
68 … args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2); in atombios_overscan_setup()
69 …args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / … in atombios_overscan_setup()
317 args.usV_Size = cpu_to_le16(mode->crtc_vdisplay - (radeon_crtc->v_border * 2)); in atombios_set_crtc_dtd_timing()
319 cpu_to_le16(mode->crtc_vblank_end - mode->crtc_vdisplay + (radeon_crtc->v_border * 2)); in atombios_set_crtc_dtd_timing()
[all …]
Dradeon_encoders.c356 adjusted_mode->crtc_vdisplay = native_mode->vdisplay; in radeon_panel_mode_fixup()
363 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank; in radeon_panel_mode_fixup()
364 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover; in radeon_panel_mode_fixup()
Dradeon_legacy_crtc.c99 | ((mode->crtc_vdisplay - 1) << 16)); in radeon_legacy_rmx_mode_set()
181 | ((mode->crtc_vdisplay - 1) << 16)); in radeon_legacy_rmx_mode_set()
638 | ((mode->crtc_vdisplay - 1) << 16)); in radeon_set_crtc_timing()
/drivers/gpu/drm/arc/
Darcpgu_crtc.c88 ENCODE_PGU_XY(m->crtc_vsync_start - m->crtc_vdisplay, in arc_pgu_crtc_mode_set_nofb()
89 m->crtc_vsync_end - m->crtc_vdisplay)); in arc_pgu_crtc_mode_set_nofb()
/drivers/gpu/drm/
Ddrm_modes.c824 *vdisplay = adjusted.crtc_vdisplay; in drm_mode_get_hv_timing()
854 p->crtc_vdisplay = p->vdisplay; in drm_mode_set_crtcinfo()
861 p->crtc_vdisplay /= 2; in drm_mode_set_crtcinfo()
870 p->crtc_vdisplay *= 2; in drm_mode_set_crtcinfo()
879 p->crtc_vdisplay *= p->vscan; in drm_mode_set_crtcinfo()
892 p->crtc_vdisplay += p->crtc_vtotal; in drm_mode_set_crtcinfo()
900 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); in drm_mode_set_crtcinfo()
/drivers/gpu/drm/ast/
Dast_mode.c125 if (crtc->mode.crtc_vdisplay == 800) in ast_get_vbios_mode_info()
137 if (crtc->mode.crtc_vdisplay == 900) in ast_get_vbios_mode_info()
146 if (crtc->mode.crtc_vdisplay == 1080) in ast_get_vbios_mode_info()
225 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay); in ast_get_vbios_mode_info()
226 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8); in ast_get_vbios_mode_info()
353 temp = mode->crtc_vdisplay - 1; in ast_set_crtc_reg()
/drivers/gpu/drm/arm/
Dhdlcd_crtc.c135 vm.vfront_porch = m->crtc_vsync_start - m->crtc_vdisplay; in hdlcd_crtc_mode_set_nofb()
153 hdlcd_write(hdlcd, HDLCD_REG_V_DATA, m->crtc_vdisplay - 1); in hdlcd_crtc_mode_set_nofb()
/drivers/gpu/drm/udl/
Dudl_modeset.c178 yde = yds + mode->crtc_vdisplay; in udl_set_vid_cmds()
206 wrptr = udl_set_register_16(wrptr, 0x17, mode->crtc_vdisplay); in udl_set_vid_cmds()
/drivers/gpu/drm/sun4i/
Dsun4i_tcon.c276 SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay)); in sun4i_tcon0_mode_set_common()
382 start_delay = (mode->crtc_vtotal - mode->crtc_vdisplay - 10 - 1); in sun4i_tcon0_mode_set_cpu()
614 SUN4I_TCON1_BASIC0_Y(mode->crtc_vdisplay)); in sun4i_tcon1_mode_set()
619 SUN4I_TCON1_BASIC1_Y(mode->crtc_vdisplay)); in sun4i_tcon1_mode_set()
624 SUN4I_TCON1_BASIC2_Y(mode->crtc_vdisplay)); in sun4i_tcon1_mode_set()
/drivers/gpu/drm/nouveau/dispnv50/
Dhead.c267 m->v.blanks = m->v.blanke + mode->crtc_vdisplay; in nv50_head_atomic_check_mode()
270 blankus = (m->v.active - mode->crtc_vdisplay - 2) * m->h.active; in nv50_head_atomic_check_mode()
277 m->v.blank2s = m->v.blank2e + mode->crtc_vdisplay; in nv50_head_atomic_check_mode()
/drivers/gpu/drm/vc4/
Dvc4_crtc.c330 VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay, in vc4_crtc_config_pv()
332 VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE)); in vc4_crtc_config_pv()
344 mode->crtc_vdisplay, in vc4_crtc_config_pv()
346 VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE)); in vc4_crtc_config_pv()
/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_crtc.c78 vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay; in atmel_hlcdc_crtc_mode_set_nofb()
96 ((adj->crtc_vdisplay - 1) << 16)); in atmel_hlcdc_crtc_mode_set_nofb()
/drivers/gpu/drm/nouveau/dispnv04/
Dcrtc.c246 int vertDisplay = mode->crtc_vdisplay - 1; in nv_crtc_mode_set_vga()
250 int vertBlankStart = mode->crtc_vdisplay - 1; in nv_crtc_mode_set_vga()
552 regp->crtc_830 = mode->crtc_vdisplay - 3; in nv_crtc_mode_set_regs()
553 regp->crtc_834 = mode->crtc_vdisplay - 1; in nv_crtc_mode_set_regs()

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