| /drivers/staging/media/imx/ |
| D | imx6-mipi-csi2.c | 121 static void csi2_enable(struct csi2_dev *csi2, bool enable) in csi2_enable() argument
124 writel(0x1, csi2->base + CSI2_PHY_SHUTDOWNZ); in csi2_enable()
125 writel(0x1, csi2->base + CSI2_DPHY_RSTZ); in csi2_enable()
126 writel(0x1, csi2->base + CSI2_RESETN); in csi2_enable()
128 writel(0x0, csi2->base + CSI2_PHY_SHUTDOWNZ); in csi2_enable()
129 writel(0x0, csi2->base + CSI2_DPHY_RSTZ); in csi2_enable()
130 writel(0x0, csi2->base + CSI2_RESETN); in csi2_enable()
134 static void csi2_set_lanes(struct csi2_dev *csi2) in csi2_set_lanes() argument
136 int lanes = csi2->bus.num_data_lanes; in csi2_set_lanes()
138 writel(lanes - 1, csi2->base + CSI2_N_LANES); in csi2_set_lanes()
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| D | Makefile | 15 obj-$(CONFIG_VIDEO_IMX_CSI) += imx6-mipi-csi2.o
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| /drivers/staging/media/omap4iss/ |
| D | iss_csi2.c | 24 static void csi2_if_enable(struct iss_csi2_device *csi2, u8 enable) in csi2_if_enable() argument
26 struct iss_csi2_ctrl_cfg *currctrl = &csi2->ctrl; in csi2_if_enable()
28 iss_reg_update(csi2->iss, csi2->regs1, CSI2_CTRL, CSI2_CTRL_IF_EN, in csi2_if_enable()
39 static void csi2_recv_config(struct iss_csi2_device *csi2, in csi2_recv_config() argument
88 iss_reg_write(csi2->iss, csi2->regs1, CSI2_CTRL, reg); in csi2_recv_config()
194 static u16 csi2_ctx_map_format(struct iss_csi2_device *csi2) in csi2_ctx_map_format() argument
196 const struct v4l2_mbus_framefmt *fmt = &csi2->formats[CSI2_PAD_SINK]; in csi2_ctx_map_format()
228 if (!(csi2->output & CSI2_OUTPUT_IPIPEIF) && in csi2_ctx_map_format()
229 !(csi2->output & CSI2_OUTPUT_MEMORY)) { in csi2_ctx_map_format()
237 destidx = csi2->frame_skip ? 0 : !!(csi2->output & CSI2_OUTPUT_IPIPEIF); in csi2_ctx_map_format()
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| D | iss_csiphy.c | 118 struct iss_csi2_device *csi2 = v4l2_get_subdevdata(csi2_subdev); in omap4iss_csiphy_config() local
128 lanes = &subdevs->bus.csi2.lanecfg; in omap4iss_csiphy_config()
171 csi2->phy->used_data_lanes = 0; in omap4iss_csiphy_config()
174 for (i = 0; i < csi2->phy->max_data_lanes; i++) { in omap4iss_csiphy_config()
179 lanes->data[i].pos > (csi2->phy->max_data_lanes + 1)) in omap4iss_csiphy_config()
186 csi2->phy->used_data_lanes++; in omap4iss_csiphy_config()
190 lanes->clk.pos > (csi2->phy->max_data_lanes + 1)) in omap4iss_csiphy_config()
197 / (2 * csi2->phy->used_data_lanes) in omap4iss_csiphy_config()
210 mutex_lock(&csi2->phy->mutex); in omap4iss_csiphy_config()
211 csi2->phy->dphy = csi2phy; in omap4iss_csiphy_config()
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| D | iss_csi2.h | 147 void omap4iss_csi2_isr(struct iss_csi2_device *csi2);
148 int omap4iss_csi2_reset(struct iss_csi2_device *csi2);
152 void omap4iss_csi2_unregister_entities(struct iss_csi2_device *csi2);
153 int omap4iss_csi2_register_entities(struct iss_csi2_device *csi2,
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| D | iss_csiphy.h | 29 struct iss_csi2_device *csi2; member
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| /drivers/media/platform/omap3isp/ |
| D | ispcsi2.c | 28 struct isp_csi2_device *csi2, u8 enable) in csi2_if_enable() argument
30 struct isp_csi2_ctrl_cfg *currctrl = &csi2->ctrl; in csi2_if_enable()
32 isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_CTRL, ISPCSI2_CTRL_IF_EN, in csi2_if_enable()
44 struct isp_csi2_device *csi2, in csi2_recv_config() argument
49 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTRL); in csi2_recv_config()
74 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTRL); in csi2_recv_config()
165 static u16 csi2_ctx_map_format(struct isp_csi2_device *csi2) in csi2_ctx_map_format() argument
167 const struct v4l2_mbus_framefmt *fmt = &csi2->formats[CSI2_PAD_SINK]; in csi2_ctx_map_format()
192 if (!(csi2->output & CSI2_OUTPUT_CCDC) && in csi2_ctx_map_format()
193 !(csi2->output & CSI2_OUTPUT_MEMORY)) { in csi2_ctx_map_format()
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| D | ispcsi2.h | 145 void omap3isp_csi2_isr(struct isp_csi2_device *csi2);
146 int omap3isp_csi2_reset(struct isp_csi2_device *csi2);
149 void omap3isp_csi2_unregister_entities(struct isp_csi2_device *csi2);
150 int omap3isp_csi2_register_entities(struct isp_csi2_device *csi2,
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| D | ispcsiphy.c | 177 lanes = &buscfg->bus.csi2.lanecfg; in omap3isp_csiphy_config()
178 num_data_lanes = buscfg->bus.csi2.num_data_lanes; in omap3isp_csiphy_config()
276 rval = omap3isp_csi2_reset(phy->csi2); in omap3isp_csiphy_acquire()
332 phy2->csi2 = &isp->isp_csi2a; in omap3isp_csiphy_init()
342 phy1->csi2 = &isp->isp_csi2c; in omap3isp_csiphy_init()
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| D | ispcsiphy.h | 25 struct isp_csi2_device *csi2; member
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| D | isp.c | 2079 buscfg->bus.csi2.lanecfg.clk.pos = vep->bus.mipi_csi2.clock_lane; in isp_parse_of_csi2_endpoint()
2080 buscfg->bus.csi2.lanecfg.clk.pol = in isp_parse_of_csi2_endpoint()
2083 buscfg->bus.csi2.lanecfg.clk.pol, in isp_parse_of_csi2_endpoint()
2084 buscfg->bus.csi2.lanecfg.clk.pos); in isp_parse_of_csi2_endpoint()
2086 buscfg->bus.csi2.num_data_lanes = vep->bus.mipi_csi2.num_data_lanes; in isp_parse_of_csi2_endpoint()
2088 for (i = 0; i < buscfg->bus.csi2.num_data_lanes; i++) { in isp_parse_of_csi2_endpoint()
2089 buscfg->bus.csi2.lanecfg.data[i].pos = in isp_parse_of_csi2_endpoint()
2091 buscfg->bus.csi2.lanecfg.data[i].pol = in isp_parse_of_csi2_endpoint()
2095 buscfg->bus.csi2.lanecfg.data[i].pol, in isp_parse_of_csi2_endpoint()
2096 buscfg->bus.csi2.lanecfg.data[i].pos); in isp_parse_of_csi2_endpoint()
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| D | omap3isp.h | 126 struct isp_csi2_cfg csi2; member
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| /drivers/media/platform/qcom/camss/ |
| D | camss-csiphy-2ph-1-0.c | 88 struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg; in csiphy_lanes_enable()
128 struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg; in csiphy_lanes_disable()
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| D | camss-csiphy.h | 42 struct csiphy_csi2_cfg *csi2; member
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| D | camss.h | 90 struct csiphy_csi2_cfg csi2; member
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| D | camss.c | 430 struct csiphy_lanes_cfg *lncfg = &csd->interface.csi2.lane_cfg; in camss_of_parse_endpoint_node()
747 csiphy->cfg.csi2 = &csd->interface.csi2; in camss_subdev_notifier_bound()
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| D | camss-csiphy.c | 122 u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data; in csiphy_set_clock_rates()
242 u8 lane_mask = csiphy_get_lane_mask(&cfg->csi2->lane_cfg); in csiphy_stream_on()
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| D | camss-csiphy-3ph-1-0.c | 140 struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg; in csiphy_lanes_enable()
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| /drivers/media/pci/intel/ipu3/ |
| D | ipu3-cio2.c | 360 u8 lanes, csi2bus = q->csi2.port; in cio2_hw_init()
369 lanes = q->csi2.lanes; in cio2_hw_init()
498 base + CIO2_REG_PXM_FRF_CFG(q->csi2.port)); in cio2_hw_init()
1391 struct csi2_bus_info csi2; member
1405 if (cio2->queue[s_asd->csi2.port].sensor) in cio2_notifier_bound()
1408 q = &cio2->queue[s_asd->csi2.port]; in cio2_notifier_bound()
1410 q->csi2 = s_asd->csi2; in cio2_notifier_bound()
1412 q->csi_rx_base = cio2->base + CIO2_REG_PIPE_BASE(q->csi2.port); in cio2_notifier_bound()
1427 cio2->queue[s_asd->csi2.port].sensor = NULL; in cio2_notifier_unbind()
1443 q = &cio2->queue[s_asd->csi2.port]; in cio2_notifier_complete()
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| D | ipu3-cio2.h | 329 struct csi2_bus_info csi2; member
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| /drivers/media/i2c/adv748x/ |
| D | Makefile | 5 adv748x-csi2.o \
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| /drivers/media/platform/rcar-vin/ |
| D | Makefile | 4 obj-$(CONFIG_VIDEO_RCAR_CSI2) += rcar-csi2.o
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| D | Kconfig | 13 module will be called rcar-csi2.
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| /drivers/media/i2c/ |
| D | smiapp-pll.h | 35 } csi2; member
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| D | smiapp-pll.c | 410 lane_op_clock_ratio = pll->csi2.lanes; in smiapp_pll_calculate()
422 * (pll->csi2.lanes / lane_op_clock_ratio); in smiapp_pll_calculate()
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