Searched refs:cts_32khz (Results 1 – 14 of 14) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_afmt.c | 100 amdgpu_afmt_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); in amdgpu_afmt_acr()
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| D | amdgpu.h | 1226 int cts_32khz; member
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| D | dce_v8_0.c | 1437 WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT)); in dce_v8_0_afmt_update_ACR()
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| D | dce_v6_0.c | 1407 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz); in dce_v6_0_audio_set_acr()
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| D | dce_v11_0.c | 1517 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz); in dce_v11_0_afmt_update_ACR()
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| D | dce_v10_0.c | 1475 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz); in dce_v10_0_afmt_update_ACR()
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | stream_encoder.h | 61 uint32_t cts_32khz; member
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| /drivers/gpu/drm/radeon/ |
| D | dce3_1_afmt.c | 181 HDMI0_ACR_CTS_32(acr->cts_32khz), in dce3_2_hdmi_update_acr()
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| D | evergreen_hdmi.c | 87 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz)); in evergreen_hdmi_update_acr()
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| D | r600_hdmi.c | 193 HDMI0_ACR_CTS_32(acr->cts_32khz), in r600_hdmi_update_acr()
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| D | radeon_audio.c | 612 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); in radeon_audio_acr()
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| D | radeon.h | 2903 int cts_32khz; member
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_stream_encoder.c | 1263 audio_clock_info->cts_32khz = actual_pixel_clock_100Hz / 10; in get_audio_clock_info()
1335 REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz); in enc1_se_setup_hdmi_audio()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_stream_encoder.c | 1322 audio_clock_info->cts_32khz = actual_pixel_clock_100Hz / 10; in get_audio_clock_info()
1400 REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz); in dce110_se_setup_hdmi_audio()
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