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Searched refs:data_rate (Results 1 – 25 of 44) sorted by relevance

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/drivers/gpu/drm/i915/display/
Dintel_bw.c268 unsigned int data_rate = 0; in intel_bw_crtc_data_rate() local
279 data_rate += crtc_state->data_rate[plane_id]; in intel_bw_crtc_data_rate()
282 return data_rate; in intel_bw_crtc_data_rate()
290 bw_state->data_rate[crtc->pipe] = in intel_bw_crtc_update()
297 bw_state->data_rate[crtc->pipe], in intel_bw_crtc_update()
316 unsigned int data_rate = 0; in intel_bw_data_rate() local
320 data_rate += bw_state->data_rate[pipe]; in intel_bw_data_rate()
322 return data_rate; in intel_bw_data_rate()
344 unsigned int data_rate, max_data_rate; in intel_bw_atomic_check() local
376 bw_state->data_rate[crtc->pipe] = new_data_rate; in intel_bw_atomic_check()
[all …]
Dintel_bw.h20 unsigned int data_rate[I915_MAX_PIPES]; member
Dintel_atomic_plane.c152 new_crtc_state->data_rate[plane->id] = 0; in intel_plane_atomic_check_with_state()
177 new_crtc_state->data_rate[plane->id] = in intel_plane_atomic_check_with_state()
/drivers/iio/adc/
Dti-ads1015.c241 unsigned int *data_rate; member
343 dr = data->channel_data[chan].data_rate; in ads1015_get_adc_result()
366 conv_time = DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr_old]); in ads1015_get_adc_result()
367 conv_time += DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr]); in ads1015_get_adc_result()
430 if (data->data_rate[i] == rate) { in ads1015_set_data_rate()
431 data->channel_data[chan].data_rate = i; in ads1015_set_data_rate()
489 idx = data->channel_data[chan->address].data_rate; in ads1015_read_raw()
490 *val = data->data_rate[idx]; in ads1015_read_raw()
547 dr = data->channel_data[chan->address].data_rate; in ads1015_read_event()
550 USEC_PER_SEC / data->data_rate[dr]; in ads1015_read_event()
[all …]
/drivers/gpu/drm/mediatek/
Dmtk_mipi_tx.c129 u32 data_rate; member
170 dev_dbg(mipi_tx->dev, "prepare: %u Hz\n", mipi_tx->data_rate); in mtk_mipi_tx_pll_prepare()
172 if (mipi_tx->data_rate >= 500000000) { in mtk_mipi_tx_pll_prepare()
176 } else if (mipi_tx->data_rate >= 250000000) { in mtk_mipi_tx_pll_prepare()
180 } else if (mipi_tx->data_rate >= 125000000) { in mtk_mipi_tx_pll_prepare()
184 } else if (mipi_tx->data_rate > 62000000) { in mtk_mipi_tx_pll_prepare()
188 } else if (mipi_tx->data_rate >= 50000000) { in mtk_mipi_tx_pll_prepare()
233 pcw = div_u64(((u64)mipi_tx->data_rate * 2 * txdiv) << 24, in mtk_mipi_tx_pll_prepare()
297 mipi_tx->data_rate = rate; in mtk_mipi_tx_pll_set_rate()
307 return mipi_tx->data_rate; in mtk_mipi_tx_pll_recalc_rate()
Dmtk_dsi.c169 u32 data_rate; member
208 ui = 1000 / dsi->data_rate + 0x01; in mtk_dsi_phy_timconfig()
209 cycle_time = 8000 / dsi->data_rate + 0x01; in mtk_dsi_phy_timconfig()
563 dsi->data_rate = DIV_ROUND_UP_ULL(pixel_clock * total_bits, in mtk_dsi_poweron()
566 ret = clk_set_rate(dsi->hs_clk, dsi->data_rate); in mtk_dsi_poweron()
/drivers/media/dvb-frontends/
Dsi21xx.c352 u32 sym_rate, data_rate; in si21xx_set_symbolrate() local
361 data_rate = srate; in si21xx_set_symbolrate()
366 sym_rate = sym_rate + ((data_rate % 100) * 0x800000) / in si21xx_set_symbolrate()
368 data_rate /= 100; in si21xx_set_symbolrate()
729 int data_rate; in si21xx_set_frontend() local
750 data_rate = c->symbol_rate / 100; in si21xx_set_frontend()
755 + (data_rate * 135)) / 200; in si21xx_set_frontend()
758 + (data_rate * 135)) / 200; in si21xx_set_frontend()
/drivers/staging/rtl8723bs/hal/
Dodm_HWConfig.c95 isCCKrate = pPktinfo->data_rate <= DESC_RATE11M; in odm_RxPhyStatus92CSeries_Parsing()
198 if (pPktinfo->data_rate >= DESC_RATEMCS8 && pPktinfo->data_rate <= DESC_RATEMCS15) in odm_RxPhyStatus92CSeries_Parsing()
276 isCCKrate = ((pPktinfo->data_rate <= DESC_RATE11M)) ? true : false; in odm_Process_RSSIForDM()
277 pDM_Odm->RxRate = pPktinfo->data_rate; in odm_Process_RSSIForDM()
Drtl8723bs_recv.c66 pattrib->data_rate = (u8)prxreport->rx_rate; in update_recvframe_attrib()
94 .data_rate = 0x00, in update_recvframe_phyinfo()
132 pkt_info.data_rate = pattrib->data_rate; in update_recvframe_phyinfo()
Dhal_com.c1605 HDATA_RATE(psample_pkt_rssi->data_rate), in rtw_get_raw_rssi_info()
1609 isCCKrate = psample_pkt_rssi->data_rate <= DESC_RATE11M; in rtw_get_raw_rssi_info()
1640 HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all); in rtw_dump_raw_rssi_info()
1642 isCCKrate = psample_pkt_rssi->data_rate <= DESC_RATE11M; in rtw_dump_raw_rssi_info()
1669 psample_pkt_rssi->data_rate = pattrib->data_rate; in rtw_store_phy_info()
1670 isCCKrate = pattrib->data_rate <= DESC_RATE11M; in rtw_store_phy_info()
/drivers/staging/rtl8192e/
Drtllib_tx.c346 if (tcb_desc->data_rate == 2) in rtllib_qurey_ShortPreambleMode()
387 if ((tcb_desc->data_rate & 0x80) == 0) in rtllib_query_BandwidthMode()
892 tcb_desc->data_rate = in rtllib_xmit_inter()
896 tcb_desc->data_rate = ieee->basic_rate; in rtllib_xmit_inter()
910 tcb_desc->data_rate = ieee->basic_rate; in rtllib_xmit_inter()
912 tcb_desc->data_rate = rtllib_current_rate(ieee); in rtllib_xmit_inter()
917 tcb_desc->data_rate = in rtllib_xmit_inter()
921 tcb_desc->data_rate = MGN_1M; in rtllib_xmit_inter()
/drivers/gpu/drm/radeon/
Drv740_dpm.c98 u16 data_rate; in rv740_get_dll_speed() local
105 data_rate = (u16)(memory_clock * factor / 1000); in rv740_get_dll_speed()
107 if (data_rate < dll_speed_table[0].max) { in rv740_get_dll_speed()
109 if (data_rate > dll_speed_table[i].min && in rv740_get_dll_speed()
110 data_rate <= dll_speed_table[i].max) in rv740_get_dll_speed()
/drivers/char/hw_random/
Doptee-rng.c65 u32 data_rate; member
134 msleep((1000 * (max - read)) / pvt_data->data_rate); in optee_rng_read()
200 pvt_data.data_rate = param[0].u.value.a; in get_optee_rng_info()
/drivers/net/wireless/marvell/mwifiex/
Djoin.c173 priv->data_rate); in mwifiex_get_common_rates()
177 if ((*ptr & 0x7f) == priv->data_rate) { in mwifiex_get_common_rates()
186 priv->data_rate); in mwifiex_get_common_rates()
965 memset(adhoc_start->data_rate, 0, sizeof(adhoc_start->data_rate)); in mwifiex_cmd_802_11_ad_hoc_start()
966 mwifiex_get_active_data_rates(priv, adhoc_start->data_rate); in mwifiex_cmd_802_11_ad_hoc_start()
978 for (i = 0; i < sizeof(adhoc_start->data_rate); i++) in mwifiex_cmd_802_11_ad_hoc_start()
979 if (!adhoc_start->data_rate[i]) in mwifiex_cmd_802_11_ad_hoc_start()
986 &adhoc_start->data_rate, priv->curr_bss_params.num_of_rates); in mwifiex_cmd_802_11_ad_hoc_start()
989 adhoc_start->data_rate); in mwifiex_cmd_802_11_ad_hoc_start()
Dsta_cmdresp.c321 priv->data_rate = 0; in mwifiex_ret_tx_rate_cfg()
531 priv->data_rate = in mwifiex_ret_802_11_tx_rate_query()
Dinit.c90 priv->data_rate = 0; /* Initially indicate the rate as auto */ in mwifiex_init_priv()
/drivers/staging/rtl8192u/ieee80211/
Dieee80211_tx.c354 if (tcb_desc->data_rate == 2) {//// 1M can only use Long Preamble. 11B spec in ieee80211_qurey_ShortPreambleMode()
395 if ((tcb_desc->data_rate & 0x80) == 0) // If using legacy rate, it shall use 20MHz channel. in ieee80211_query_BandwidthMode()
810 tcb_desc->data_rate = ieee->basic_rate; in ieee80211_xmit()
812 tcb_desc->data_rate = CURRENT_RATE(ieee->mode, ieee->rate, ieee->HTCurrentOperaRate); in ieee80211_xmit()
/drivers/input/misc/
Dadxl34x.c224 .data_rate = 8,
535 return sprintf(buf, "%u\n", RATE(ac->pdata.data_rate)); in adxl34x_rate_show()
552 ac->pdata.data_rate = RATE(val); in adxl34x_rate_store()
554 ac->pdata.data_rate | in adxl34x_rate_store()
846 AC_WRITE(ac, BW_RATE, RATE(ac->pdata.data_rate) | in adxl34x_probe()
/drivers/staging/rtl8723bs/include/
Drtw_recv.h119 u8 data_rate; member
173 u8 data_rate; member
/drivers/staging/rtl8188eu/hal/
Drtl8188eu_xmit.c165 u8 data_rate, pwr_status, offset; in update_txdesc() local
254 data_rate = ODM_RA_GetDecisionRate_8188E(odmpriv, pattrib->mac_id); in update_txdesc()
255 ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F); in update_txdesc()
/drivers/tty/
Dsynclink_gt.c366 .data_rate = 9600,
476 static void set_rate(struct slgt_info *info, u32 data_rate);
906 if (info->params.data_rate) { in wait_until_sent()
1142 tmp_params.data_rate = (compat_ulong_t)info->params.data_rate; in get_params32()
1172 info->params.data_rate = tmp_params.data_rate; in set_params32()
2547 info->params.data_rate = tty_get_baud_rate(info->port.tty); in change_params()
2549 if (info->params.data_rate) { in change_params()
2551 info->params.data_rate; in change_params()
4214 if ((rd_reg32(info, JCR) & BIT8) && info->params.data_rate && in async_mode()
4215 ((info->base_clock < (info->params.data_rate * 16)) || in async_mode()
[all …]
Dsynclink.c1956 if (info->params.data_rate <= 460800) in mgsl_change_params()
1957 info->params.data_rate = tty_get_baud_rate(info->port.tty); in mgsl_change_params()
1959 if ( info->params.data_rate ) { in mgsl_change_params()
1961 info->params.data_rate; in mgsl_change_params()
3135 if ( info->params.data_rate ) { in mgsl_wait_until_sent()
5198 static void usc_enable_aux_clock( struct mgsl_struct *info, u32 data_rate ) in usc_enable_aux_clock() argument
5203 if ( data_rate ) { in usc_enable_aux_clock()
5217 Tc = (u16)(XtalSpeed/data_rate); in usc_enable_aux_clock()
5218 if ( !(((XtalSpeed % data_rate) * 2) / data_rate) ) in usc_enable_aux_clock()
5937 usc_enable_async_clock( info, info->params.data_rate ); in usc_set_async_mode()
[all …]
Dsynclinkmp.c591 static void set_rate(SLMP_INFO *info, u32 data_rate);
1075 if ( info->params.data_rate ) { in wait_until_sent()
2791 if (info->params.data_rate <= 460800) { in change_params()
2792 info->params.data_rate = tty_get_baud_rate(info->port.tty); in change_params()
2795 if ( info->params.data_rate ) { in change_params()
2797 info->params.data_rate; in change_params()
4055 static void set_rate( SLMP_INFO *info, u32 data_rate ) in set_rate() argument
4063 if (data_rate != 0) { in set_rate()
4064 Divisor = 14745600/data_rate; in set_rate()
4495 set_rate( info, info->params.data_rate * 16 ); in async_mode()
/drivers/char/pcmcia/
Dsynclink_cs.c1459 if (info->params.data_rate <= 460800) { in mgslpc_change_params()
1460 info->params.data_rate = tty_get_baud_rate(tty); in mgslpc_change_params()
1463 if (info->params.data_rate) { in mgslpc_change_params()
1465 info->params.data_rate; in mgslpc_change_params()
2384 if (info->params.data_rate) { in mgslpc_wait_until_sent()
3474 mgslpc_set_rate(info, CHA, info->params.data_rate * 16); in async_mode()
/drivers/net/wireless/rsi/
Drsi_mgmt.h453 __le16 data_rate; member

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