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Searched refs:dcef_clock (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/powerplay/inc/
Dsmu_v11_0.h82 uint32_t dcef_clock; member
Damdgpu_smu.h311 uint32_t dcef_clock; member
/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega20_hwmgr.h148 PP_Clock dcef_clock; member
221 uint32_t dcef_clock; member
Dvega10_hwmgr.h190 uint32_t dcef_clock; member
Dvega12_hwmgr.h169 uint32_t dcef_clock; member
Dvega20_hwmgr.c718 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100; in vega20_setup_default_dpm_tables()
803 data->vbios_boot_state.dcef_clock = boot_up_values.ulDCEFClk; in vega20_init_smc_table()
812 (uint32_t)(data->vbios_boot_state.dcef_clock / 100)); in vega20_init_smc_table()
1587 max_sustainable_clocks->dcef_clock = data->vbios_boot_state.dcef_clock / 100; in vega20_init_max_sustainable_clocks()
1608 &(max_sustainable_clocks->dcef_clock), in vega20_init_max_sustainable_clocks()
Dvega12_hwmgr.c648 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100; in vega12_setup_default_dpm_tables()
747 data->vbios_boot_state.dcef_clock = boot_up_values.ulDCEFClk; in vega12_init_smc_table()
754 (uint32_t)(data->vbios_boot_state.dcef_clock / 100)); in vega12_init_smc_table()
Dvega10_hwmgr.c2602 data->vbios_boot_state.dcef_clock = boot_up_values.ulDCEFClk; in vega10_init_smc_table()
2613 (uint32_t)(data->vbios_boot_state.dcef_clock / 100)); in vega10_init_smc_table()
/drivers/gpu/drm/amd/powerplay/
Dsmu_v11_0.c997 max_sustainable_clocks->dcef_clock = smu->smu_table.boot_values.dcefclk / 100; in smu_v11_0_init_max_sustainable_clocks()
1026 &(max_sustainable_clocks->dcef_clock), in smu_v11_0_init_max_sustainable_clocks()
1606 (unsigned int) sustainable_clocks->dcef_clock * 1000; in smu_v11_0_get_max_sustainable_clocks_by_dc()
Dnavi10_ppt.c1259 min_clocks.dcef_clock = smu->display_config->min_dcef_set_clk; in navi10_notify_smc_dispaly_config()
1265 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in navi10_notify_smc_dispaly_config()
Dvega20_ppt.c2259 min_clocks.dcef_clock = smu->display_config->min_dcef_set_clk; in vega20_notify_smc_dispaly_config()
2265 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in vega20_notify_smc_dispaly_config()