Searched refs:display_v_end (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/msm/disp/mdp4/ |
| D | mdp4_dsi_encoder.c | 45 uint32_t display_v_start, display_v_end; in mdp4_dsi_encoder_mode_set() local
67 …display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dsi_hsync_s… in mdp4_dsi_encoder_mode_set()
78 mdp4_write(mdp4_kms, REG_MDP4_DSI_DISPLAY_VEND, display_v_end); in mdp4_dsi_encoder_mode_set()
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| D | mdp4_dtv_encoder.c | 91 uint32_t display_v_start, display_v_end; in mdp4_dtv_encoder_mode_set() local
117 …display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_s… in mdp4_dtv_encoder_mode_set()
128 mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VEND, display_v_end); in mdp4_dtv_encoder_mode_set()
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| D | mdp4_lcdc_encoder.c | 262 uint32_t display_v_start, display_v_end; in mdp4_lcdc_encoder_mode_set() local
288 …display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + lcdc_hsync_… in mdp4_lcdc_encoder_mode_set()
299 mdp4_write(mdp4_kms, REG_MDP4_LCDC_DISPLAY_VEND, display_v_end); in mdp4_lcdc_encoder_mode_set()
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_intf.c | 87 u32 display_v_start, display_v_end; in dpu_hw_intf_setup_timing_engine() local
105 display_v_end = ((vsync_period - p->v_front_porch) * hsync_period) + in dpu_hw_intf_setup_timing_engine()
110 display_v_end -= p->h_front_porch; in dpu_hw_intf_setup_timing_engine()
175 DPU_REG_WRITE(c, INTF_DISPLAY_V_END_F0, display_v_end); in dpu_hw_intf_setup_timing_engine()
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| /drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_encoder.c | 103 uint32_t display_v_start, display_v_end; in mdp5_vid_encoder_mode_set() local
153 …display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_s… in mdp5_vid_encoder_mode_set()
162 display_v_end -= mode->hsync_start - mode->hdisplay; in mdp5_vid_encoder_mode_set()
176 mdp5_write(mdp5_kms, REG_MDP5_INTF_DISPLAY_VEND_F0(intf), display_v_end); in mdp5_vid_encoder_mode_set()
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