Searched refs:dlg_vblank_end (Results 1 – 10 of 10) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_rq_dlg_helpers.c | 203 dlg_regs.dlg_vblank_end); in print__dlg_regs_st()
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| D | display_mode_structs.h | 410 unsigned int dlg_vblank_end; member
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| D | dml1_display_rq_dlg_calc.c | 1142 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */ in dml1_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hubp.c | 586 DLG_V_BLANK_END, dlg_attr->dlg_vblank_end); in hubp1_program_deadline()
866 DLG_V_BLANK_END, &dlg_attr->dlg_vblank_end); in hubp1_read_state_common()
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| D | dcn10_hw_sequencer_debug.c | 260 …pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_… in dcn10_get_dlg_states()
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| D | dcn10_hw_sequencer.c | 200 …pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_… in dcn10_log_hubp_states()
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_hubp.c | 87 DLG_V_BLANK_END, dlg_attr->dlg_vblank_end); in hubp2_program_deadline()
1064 DLG_V_BLANK_END, &dlg_attr->dlg_vblank_end); in hubp2_read_state_common()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_rq_dlg_calc_20v2.c | 920 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml20v2_rq_dlg_get_dlg_params()
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| D | display_rq_dlg_calc_20.c | 920 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml20_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_rq_dlg_calc_21.c | 967 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml_rq_dlg_get_dlg_params()
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