Searched refs:extclk (Results 1 – 6 of 6) sorted by relevance
35 struct clk *extclk; member133 rtc->extclk = devm_clk_get(dev, "EXTCLK"); in ftrtc010_rtc_probe()134 if (IS_ERR(rtc->extclk)) { in ftrtc010_rtc_probe()137 ret = clk_prepare_enable(rtc->extclk); in ftrtc010_rtc_probe()186 if (!IS_ERR(rtc->extclk)) in ftrtc010_rtc_remove()187 clk_disable_unprepare(rtc->extclk); in ftrtc010_rtc_remove()
54 unsigned extclk:1; member204 info->extclk = pdata->extclk; in max8649_regulator_probe()205 data = (info->extclk) ? MAX8649_SYNC_EXTCLK : 0; in max8649_regulator_probe()208 if (info->extclk) { in max8649_regulator_probe()
615 const u8 extclk = VC5_OUT_DIV_CONTROL_SELB_NORM | in vc5_clk_out_get_parent() local628 if (src == extclk) in vc5_clk_out_get_parent()644 const u8 extclk = VC5_OUT_DIV_CONTROL_SELB_NORM | in vc5_clk_out_set_parent() local651 src |= extclk; in vc5_clk_out_set_parent()
222 unsigned long extclk; in rcar_du_crtc_set_display_timing() local244 extclk = clk_get_rate(rcrtc->extclock); in rcar_du_crtc_set_display_timing()245 rcar_du_dpll_divider(rcrtc, &dpll, extclk, target); in rcar_du_crtc_set_display_timing()
897 u32 l = 0, clkd = 0, div, extclk = 0, clkg = 0; in omap2_mcspi_setup_transfer() local920 extclk = (div - 1) >> 4; in omap2_mcspi_setup_transfer()958 cs->chctrl0 |= extclk << 8; in omap2_mcspi_setup_transfer()
86 u32 extclk; member805 u32 quartz = state->base->extclk / 1000000; in set_mclock()1811 base->extclk = cfg->clk ? cfg->clk : 30000000; in stv0910_attach()