Home
last modified time | relevance | path

Searched refs:gbase (Results 1 – 3 of 3) sorted by relevance

/drivers/clk/berlin/
Dbg2.c87 static void __iomem *gbase; variable
508 gbase = of_iomap(parent_np, 0); in berlin2_clock_setup()
509 if (!gbase) in berlin2_clock_setup()
526 ret = berlin2_pll_register(&bg2_pll_map, gbase + REG_SYSPLLCTL0, in berlin2_clock_setup()
531 ret = berlin2_pll_register(&bg2_pll_map, gbase + REG_MEMPLLCTL0, in berlin2_clock_setup()
536 ret = berlin2_pll_register(&bg2_pll_map, gbase + REG_CPUPLLCTL0, in berlin2_clock_setup()
545 ret = berlin2_avpll_vco_register(gbase + REG_AVPLLCTL0, "avpll_vcoA", in berlin2_clock_setup()
551 ret = berlin2_avpll_channel_register(gbase + REG_AVPLLCTL0, in berlin2_clock_setup()
558 ret = berlin2_avpll_vco_register(gbase + REG_AVPLLCTL31, "avpll_vcoB", in berlin2_clock_setup()
565 ret = berlin2_avpll_channel_register(gbase + REG_AVPLLCTL31, in berlin2_clock_setup()
[all …]
Dbg2q.c41 static void __iomem *gbase; variable
294 gbase = of_iomap(parent_np, 0); in berlin2q_clock_setup()
295 if (!gbase) { in berlin2q_clock_setup()
304 iounmap(gbase); in berlin2q_clock_setup()
316 ret = berlin2_pll_register(&bg2q_pll_map, gbase + REG_SYSPLLCTL0, in berlin2q_clock_setup()
341 hws[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase, in berlin2q_clock_setup()
351 gd->parent_name, gd->flags, gbase + REG_CLKENABLE, in berlin2q_clock_setup()
379 iounmap(gbase); in berlin2q_clock_setup()
/drivers/mfd/
Dlpc_ich.c90 int gbase; /* GPIO base */ member
967 pci_read_config_dword(dev, priv->gbase, &base_addr_cfg); in lpc_ich_init_gpio()
1181 priv->gbase = GPIOBASE_ICH0; in lpc_ich_probe()
1184 priv->gbase = GPIOBASE_ICH6; in lpc_ich_probe()